xref: /linux/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml (revision 7a012a692e7cfbca245d195a80f23634d3d74fcc) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11  - Sascha Hauer <s.hauer@pengutronix.de>
12  - Fabio Estevam <festevam@gmail.com>
13
14allOf:
15  - $ref: watchdog.yaml#
16
17properties:
18  compatible:
19    oneOf:
20      - const: fsl,imx7ulp-wdt
21      - items:
22          - const: fsl,imx8ulp-wdt
23          - const: fsl,imx7ulp-wdt
24      - const: fsl,imx93-wdt
25      - items:
26          - enum:
27              - fsl,imx94-wdt
28          - const: fsl,imx93-wdt
29
30  reg:
31    maxItems: 1
32
33  interrupts:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39  fsl,ext-reset-output:
40    description:
41      When set, wdog can generate external reset from the wdog_any pin.
42    type: boolean
43
44required:
45  - compatible
46  - interrupts
47  - reg
48  - clocks
49
50unevaluatedProperties: false
51
52examples:
53  - |
54    #include <dt-bindings/interrupt-controller/arm-gic.h>
55    #include <dt-bindings/clock/imx7ulp-clock.h>
56
57    watchdog@403d0000 {
58        compatible = "fsl,imx7ulp-wdt";
59        reg = <0x403d0000 0x10000>;
60        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
61        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
62        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
63        assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
64        timeout-sec = <40>;
65    };
66
67...
68