xref: /linux/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM AMBA Primecell SP805 Watchdog
8
9maintainers:
10  - Viresh Kumar <vireshk@kernel.org>
11
12description: |+
13  The Arm SP805 IP implements a watchdog device, which triggers an interrupt
14  after a configurable time period. If that interrupt has not been serviced
15  when the next interrupt would be triggered, the reset signal is asserted.
16
17allOf:
18  - $ref: /schemas/watchdog/watchdog.yaml#
19
20# Need a custom select here or 'arm,primecell' will match on lots of nodes
21select:
22  properties:
23    compatible:
24      contains:
25        const: arm,sp805
26  required:
27    - compatible
28
29properties:
30  compatible:
31    items:
32      - const: arm,sp805
33      - const: arm,primecell
34
35  interrupts:
36    maxItems: 1
37
38  reg:
39    maxItems: 1
40
41  clocks:
42    description: |
43      Clocks driving the watchdog timer hardware. The first clock is used
44      for the actual watchdog counter. The second clock drives the register
45      interface.
46    maxItems: 2
47
48  clock-names:
49    items:
50      - const: wdog_clk
51      - const: apb_pclk
52
53  resets:
54    maxItems: 1
55    description: WDOGRESn input reset signal for sp805 module.
56
57required:
58  - compatible
59  - reg
60  - clocks
61  - clock-names
62
63unevaluatedProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68    watchdog@66090000 {
69        compatible = "arm,sp805", "arm,primecell";
70        reg = <0x66090000 0x1000>;
71        interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
72        clocks = <&wdt_clk>, <&apb_pclk>;
73        clock-names = "wdog_clk", "apb_pclk";
74        resets = <&wdt_rst>;
75    };
76