1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: TI HD3SS3220 TypeC DRP Port Controller 8 9maintainers: 10 - Biju Das <biju.das.jz@bp.renesas.com> 11 12description: |- 13 HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel 14 Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The 15 HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a 16 Dual Role Port (DRP) making it ideal for any application. 17 18properties: 19 compatible: 20 const: ti,hd3ss3220 21 22 reg: 23 maxItems: 1 24 25 interrupts: 26 maxItems: 1 27 28 ports: 29 $ref: /schemas/graph.yaml#/properties/ports 30 description: OF graph bindings (specified in bindings/graph.txt) that model 31 SS data bus to the SS capable connector. 32 33 properties: 34 port@0: 35 $ref: /schemas/graph.yaml#/properties/port 36 description: Super Speed (SS) MUX inputs connected to SS capable connector. 37 38 port@1: 39 $ref: /schemas/graph.yaml#/properties/port 40 description: Output of 2:1 MUX connected to Super Speed (SS) data bus. 41 42 required: 43 - port@0 44 - port@1 45 46required: 47 - compatible 48 - reg 49 - interrupts 50 51additionalProperties: false 52 53examples: 54 - | 55 i2c0 { 56 #address-cells = <1>; 57 #size-cells = <0>; 58 59 hd3ss3220@47 { 60 compatible = "ti,hd3ss3220"; 61 reg = <0x47>; 62 interrupt-parent = <&gpio6>; 63 interrupts = <3>; 64 65 ports { 66 #address-cells = <1>; 67 #size-cells = <0>; 68 port@0 { 69 reg = <0>; 70 hd3ss3220_in_ep: endpoint { 71 remote-endpoint = <&ss_ep>; 72 }; 73 }; 74 port@1 { 75 reg = <1>; 76 hd3ss3220_out_ep: endpoint { 77 remote-endpoint = <&usb3_role_switch>; 78 }; 79 }; 80 }; 81 }; 82 }; 83