xref: /linux/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml (revision 4b660dbd9ee2059850fd30e0df420ca7a38a1856) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
8
9maintainers:
10  - Aswath Govindraju <a-govindraju@ti.com>
11
12properties:
13  compatible:
14    const: ti,am62-usb
15
16  reg:
17    minItems: 1
18    items:
19      - description: USB CFG register space
20      - description: USB PHY2 register space
21
22  ranges: true
23
24  power-domains:
25    description:
26      PM domain provider node and an args specifier containing
27      the USB ISO device id value. See,
28      Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
29    maxItems: 1
30
31  clocks:
32    description: Clock phandle to usb2_refclk
33    maxItems: 1
34
35  clock-names:
36    items:
37      - const: ref
38
39  ti,vbus-divider:
40    description:
41      Should be present if USB VBUS line is connected to the
42      VBUS pin of the SoC via a 1/3 voltage divider.
43    type: boolean
44
45  ti,syscon-phy-pll-refclk:
46    $ref: /schemas/types.yaml#/definitions/phandle-array
47    items:
48      - items:
49          - description: Phandle to the SYSCON entry
50          - description: USB phy control register offset within SYSCON
51    description:
52      Specifier for conveying frequency of ref clock input, for the
53      operation of USB2PHY.
54
55  '#address-cells':
56    const: 2
57
58  '#size-cells':
59    const: 2
60
61patternProperties:
62  "^usb@[0-9a-f]+$":
63    $ref: snps,dwc3.yaml#
64    description: Required child node
65
66required:
67  - compatible
68  - reg
69  - power-domains
70  - clocks
71  - clock-names
72  - ti,syscon-phy-pll-refclk
73
74additionalProperties: false
75
76examples:
77  - |
78    #include <dt-bindings/soc/ti,sci_pm_domain.h>
79    #include <dt-bindings/interrupt-controller/arm-gic.h>
80    #include <dt-bindings/gpio/gpio.h>
81
82    bus {
83      #address-cells = <2>;
84      #size-cells = <2>;
85
86      usbss1: usb@f910000 {
87        compatible = "ti,am62-usb";
88        reg = <0x00 0x0f910000 0x00 0x800>,
89              <0x00 0x0f918000 0x00 0x400>;
90        clocks = <&k3_clks 162 3>;
91        clock-names = "ref";
92        ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
93        power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
94        #address-cells = <2>;
95        #size-cells = <2>;
96
97        usb@31100000 {
98          compatible = "snps,dwc3";
99          reg = <0x00 0x31100000 0x00 0x50000>;
100          interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
101                       <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
102          interrupt-names = "host", "peripheral";
103          maximum-speed = "high-speed";
104          dr_mode = "otg";
105        };
106      };
107    };
108