1*c640a423SHang Cao# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c640a423SHang Cao%YAML 1.2 3*c640a423SHang Cao--- 4*c640a423SHang Cao$id: http://devicetree.org/schemas/usb/eswin,eic7700-usb.yaml# 5*c640a423SHang Cao$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c640a423SHang Cao 7*c640a423SHang Caotitle: ESWIN EIC7700 SoC Usb Controller 8*c640a423SHang Cao 9*c640a423SHang Caomaintainers: 10*c640a423SHang Cao - Wei Yang <yangwei1@eswincomputing.com> 11*c640a423SHang Cao - Senchuan Zhang <zhangsenchuan@eswincomputing.com> 12*c640a423SHang Cao - Hang Cao <caohang@eswincomputing.com> 13*c640a423SHang Cao 14*c640a423SHang Caodescription: 15*c640a423SHang Cao The Usb controller on EIC7700 SoC. 16*c640a423SHang Cao 17*c640a423SHang CaoallOf: 18*c640a423SHang Cao - $ref: snps,dwc3-common.yaml# 19*c640a423SHang Cao 20*c640a423SHang Caoproperties: 21*c640a423SHang Cao compatible: 22*c640a423SHang Cao const: eswin,eic7700-dwc3 23*c640a423SHang Cao 24*c640a423SHang Cao reg: 25*c640a423SHang Cao maxItems: 1 26*c640a423SHang Cao 27*c640a423SHang Cao interrupts: 28*c640a423SHang Cao maxItems: 1 29*c640a423SHang Cao 30*c640a423SHang Cao interrupt-names: 31*c640a423SHang Cao items: 32*c640a423SHang Cao - const: peripheral 33*c640a423SHang Cao 34*c640a423SHang Cao clocks: 35*c640a423SHang Cao maxItems: 3 36*c640a423SHang Cao 37*c640a423SHang Cao clock-names: 38*c640a423SHang Cao items: 39*c640a423SHang Cao - const: aclk 40*c640a423SHang Cao - const: cfg 41*c640a423SHang Cao - const: usb_en 42*c640a423SHang Cao 43*c640a423SHang Cao resets: 44*c640a423SHang Cao maxItems: 2 45*c640a423SHang Cao 46*c640a423SHang Cao reset-names: 47*c640a423SHang Cao items: 48*c640a423SHang Cao - const: vaux 49*c640a423SHang Cao - const: usb_rst 50*c640a423SHang Cao 51*c640a423SHang Cao eswin,hsp-sp-csr: 52*c640a423SHang Cao description: 53*c640a423SHang Cao HSP CSR is to control and get status of different high-speed peripherals 54*c640a423SHang Cao (such as Ethernet, USB, SATA, etc.) via register, which can tune 55*c640a423SHang Cao board-level's parameters of PHY, etc. 56*c640a423SHang Cao $ref: /schemas/types.yaml#/definitions/phandle-array 57*c640a423SHang Cao items: 58*c640a423SHang Cao - items: 59*c640a423SHang Cao - description: phandle to HSP Register Controller hsp_sp_csr node. 60*c640a423SHang Cao - description: USB bus register offset. 61*c640a423SHang Cao - description: AXI low power register offset. 62*c640a423SHang Cao 63*c640a423SHang Caorequired: 64*c640a423SHang Cao - compatible 65*c640a423SHang Cao - reg 66*c640a423SHang Cao - clocks 67*c640a423SHang Cao - clock-names 68*c640a423SHang Cao - interrupts 69*c640a423SHang Cao - interrupt-names 70*c640a423SHang Cao - resets 71*c640a423SHang Cao - reset-names 72*c640a423SHang Cao - eswin,hsp-sp-csr 73*c640a423SHang Cao 74*c640a423SHang CaounevaluatedProperties: false 75*c640a423SHang Cao 76*c640a423SHang Caoexamples: 77*c640a423SHang Cao - | 78*c640a423SHang Cao usb@50480000 { 79*c640a423SHang Cao compatible = "eswin,eic7700-dwc3"; 80*c640a423SHang Cao reg = <0x50480000 0x10000>; 81*c640a423SHang Cao clocks = <&clock 135>, 82*c640a423SHang Cao <&clock 136>, 83*c640a423SHang Cao <&hspcrg 18>; 84*c640a423SHang Cao clock-names = "aclk", "cfg", "usb_en"; 85*c640a423SHang Cao interrupt-parent = <&plic>; 86*c640a423SHang Cao interrupts = <85>; 87*c640a423SHang Cao interrupt-names = "peripheral"; 88*c640a423SHang Cao resets = <&reset 84>, <&hspcrg 2>; 89*c640a423SHang Cao reset-names = "vaux", "usb_rst"; 90*c640a423SHang Cao dr_mode = "peripheral"; 91*c640a423SHang Cao maximum-speed = "high-speed"; 92*c640a423SHang Cao phy_type = "utmi"; 93*c640a423SHang Cao eswin,hsp-sp-csr = <&hsp_sp_csr 0x800 0x818>; 94*c640a423SHang Cao }; 95