xref: /linux/Documentation/devicetree/bindings/usb/cdns,usb3.yaml (revision dba0bfded433d412506eb674d6af77cdca82e259) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cadence USBSS and USBSSP DRD controller
8
9maintainers:
10  - Pawel Laszczak <pawell@cadence.com>
11
12description:
13  Cadence USB dual-role controller. Covers USBSS (SuperSpeed, USB 3.0) and
14  USBSSP (SuperSpeed Plus, USB 3.1 gen2x1). Both variants share the same
15  DRD/OTG register interface, so the driver auto-detects the controller
16  version at runtime.
17
18properties:
19  compatible:
20    oneOf:
21      - const: cdns,usb3
22      - items:
23          - {}
24          - const: cdns,cdnsp
25
26  reg:
27    minItems: 2
28    maxItems: 3
29
30  reg-names:
31    minItems: 2
32    maxItems: 3
33    items:
34      enum: [ otg, xhci, dev ]
35
36  interrupts:
37    minItems: 2
38    items:
39      - description: XHCI host controller interrupt
40      - description: Device controller interrupt
41      - description: OTG/DRD controller interrupt
42      - description: interrupt used to wake up core, e.g when usbcmd.rs is
43                     cleared by xhci core, this interrupt is optional
44
45  interrupt-names:
46    minItems: 2
47    items:
48      - const: host
49      - const: peripheral
50      - const: otg
51      - const: wakeup
52
53  port:
54    $ref: /schemas/graph.yaml#/properties/port
55    description:
56      This port is used with the 'usb-role-switch' property to connect the
57      cdns3 to type C connector.
58
59  maximum-speed:
60    enum: [super-speed-plus, super-speed, high-speed, full-speed]
61
62  phys:
63    minItems: 1
64    maxItems: 2
65
66  phy-names:
67    minItems: 1
68    maxItems: 2
69    items:
70      anyOf:
71        - const: cdns3,usb2-phy
72        - const: cdns3,usb3-phy
73
74  cdns,on-chip-buff-size:
75    description:
76      size of memory intended as internal memory for endpoints
77      buffers expressed in KB
78    $ref: /schemas/types.yaml#/definitions/uint16
79
80  cdns,phyrst-a-enable:
81    description: Enable resetting of PHY if Rx fail is detected
82    type: boolean
83
84dependencies:
85  port: [ usb-role-switch ]
86
87required:
88  - compatible
89  - reg
90  - reg-names
91  - interrupts
92  - interrupt-names
93
94allOf:
95  - $ref: usb-drd.yaml#
96  - $ref: usb-xhci.yaml#
97
98  - if:
99      properties:
100        compatible:
101          contains:
102            const: cdns,cdnsp
103    then:
104      properties:
105        reg:
106          items:
107            - description: XHCI Host controller registers
108            - description: DEVICE controller registers
109        reg-names:
110          items:
111            - const: xhci
112            - const: dev
113        interrupts:
114          maxItems: 2
115        interrupt-names:
116          items:
117            - const: host
118            - const: peripheral
119        dr_mode:
120          enum: [host, peripheral]
121    else:
122      properties:
123        reg:
124          items:
125            - description: OTG controller registers
126            - description: XHCI Host controller registers
127            - description: DEVICE controller registers
128        reg-names:
129          items:
130            - const: otg
131            - const: xhci
132            - const: dev
133        interrupts:
134          minItems: 3
135          maxItems: 4
136        interrupt-names:
137          minItems: 3
138
139unevaluatedProperties: false
140
141examples:
142  - |
143    #include <dt-bindings/interrupt-controller/arm-gic.h>
144    bus {
145        #address-cells = <2>;
146        #size-cells = <2>;
147
148        usb@6000000 {
149            compatible = "cdns,usb3";
150            reg = <0x00 0x6000000 0x00 0x10000>,
151                  <0x00 0x6010000 0x00 0x10000>,
152                  <0x00 0x6020000 0x00 0x10000>;
153            reg-names = "otg", "xhci", "dev";
154            interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
155                         <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
156                         <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
157            interrupt-names = "host", "peripheral", "otg";
158            maximum-speed = "super-speed";
159            dr_mode = "otg";
160        };
161    };
162