xref: /linux/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml (revision 4359a011e259a4608afc7fb3635370c9d4ba5943) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car UFS Host Controller
8
9maintainers:
10  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12allOf:
13  - $ref: ufs-common.yaml
14
15properties:
16  compatible:
17    const: renesas,r8a779f0-ufs
18
19  reg:
20    maxItems: 1
21
22  clocks:
23    maxItems: 2
24
25  clock-names:
26    items:
27      - const: fck
28      - const: ref_clk
29
30  power-domains:
31    maxItems: 1
32
33  resets:
34    maxItems: 1
35
36required:
37  - compatible
38  - reg
39  - clocks
40  - clock-names
41  - power-domains
42  - resets
43
44unevaluatedProperties: false
45
46examples:
47  - |
48    #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
49    #include <dt-bindings/interrupt-controller/arm-gic.h>
50    #include <dt-bindings/power/r8a779f0-sysc.h>
51
52    ufs: ufs@e686000 {
53            compatible = "renesas,r8a779f0-ufs";
54            reg = <0xe6860000 0x100>;
55            interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
56            clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
57            clock-names = "fck", "ref_clk";
58            freq-table-hz = <200000000 200000000>, <38400000 38400000>;
59            power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
60            resets = <&cpg 1514>;
61    };
62