1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas R-Car UFS Host Controller 8 9maintainers: 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 11 12allOf: 13 - $ref: ufs-common.yaml 14 15properties: 16 compatible: 17 const: renesas,r8a779f0-ufs 18 19 reg: 20 maxItems: 1 21 22 clocks: 23 maxItems: 2 24 25 clock-names: 26 items: 27 - const: fck 28 - const: ref_clk 29 30 power-domains: 31 maxItems: 1 32 33 resets: 34 maxItems: 1 35 36 nvmem-cells: 37 maxItems: 1 38 39 nvmem-cell-names: 40 items: 41 - const: calibration 42 43dependencies: 44 nvmem-cells: [ nvmem-cell-names ] 45 46required: 47 - compatible 48 - reg 49 - clocks 50 - clock-names 51 - power-domains 52 - resets 53 54unevaluatedProperties: false 55 56examples: 57 - | 58 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 59 #include <dt-bindings/interrupt-controller/arm-gic.h> 60 #include <dt-bindings/power/r8a779f0-sysc.h> 61 62 ufs: ufs@e686000 { 63 compatible = "renesas,r8a779f0-ufs"; 64 reg = <0xe6860000 0x100>; 65 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; 66 clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; 67 clock-names = "fck", "ref_clk"; 68 freq-table-hz = <200000000 200000000>, <38400000 38400000>; 69 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 70 resets = <&cpg 1514>; 71 nvmem-cells = <&ufs_tune>; 72 nvmem-cell-names = "calibration"; 73 }; 74