1*149009f2SKrzysztof Kozlowski# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*149009f2SKrzysztof Kozlowski%YAML 1.2 3*149009f2SKrzysztof Kozlowski--- 4*149009f2SKrzysztof Kozlowski$id: http://devicetree.org/schemas/ufs/qcom,sm8650-ufshc.yaml# 5*149009f2SKrzysztof Kozlowski$schema: http://devicetree.org/meta-schemas/core.yaml# 6*149009f2SKrzysztof Kozlowski 7*149009f2SKrzysztof Kozlowskititle: Qualcomm SM8650 and Other SoCs UFS Controllers 8*149009f2SKrzysztof Kozlowski 9*149009f2SKrzysztof Kozlowskimaintainers: 10*149009f2SKrzysztof Kozlowski - Bjorn Andersson <bjorn.andersson@linaro.org> 11*149009f2SKrzysztof Kozlowski 12*149009f2SKrzysztof Kozlowski# Select only our matches, not all jedec,ufs-2.0 13*149009f2SKrzysztof Kozlowskiselect: 14*149009f2SKrzysztof Kozlowski properties: 15*149009f2SKrzysztof Kozlowski compatible: 16*149009f2SKrzysztof Kozlowski contains: 17*149009f2SKrzysztof Kozlowski enum: 18*149009f2SKrzysztof Kozlowski - qcom,sm8650-ufshc 19*149009f2SKrzysztof Kozlowski - qcom,sm8750-ufshc 20*149009f2SKrzysztof Kozlowski required: 21*149009f2SKrzysztof Kozlowski - compatible 22*149009f2SKrzysztof Kozlowski 23*149009f2SKrzysztof Kozlowskiproperties: 24*149009f2SKrzysztof Kozlowski compatible: 25*149009f2SKrzysztof Kozlowski items: 26*149009f2SKrzysztof Kozlowski - enum: 27*149009f2SKrzysztof Kozlowski - qcom,sm8650-ufshc 28*149009f2SKrzysztof Kozlowski - qcom,sm8750-ufshc 29*149009f2SKrzysztof Kozlowski - const: qcom,ufshc 30*149009f2SKrzysztof Kozlowski - const: jedec,ufs-2.0 31*149009f2SKrzysztof Kozlowski 32*149009f2SKrzysztof Kozlowski reg: 33*149009f2SKrzysztof Kozlowski minItems: 1 34*149009f2SKrzysztof Kozlowski maxItems: 2 35*149009f2SKrzysztof Kozlowski 36*149009f2SKrzysztof Kozlowski reg-names: 37*149009f2SKrzysztof Kozlowski minItems: 1 38*149009f2SKrzysztof Kozlowski items: 39*149009f2SKrzysztof Kozlowski - const: std 40*149009f2SKrzysztof Kozlowski - const: mcq 41*149009f2SKrzysztof Kozlowski 42*149009f2SKrzysztof Kozlowski clocks: 43*149009f2SKrzysztof Kozlowski minItems: 8 44*149009f2SKrzysztof Kozlowski maxItems: 8 45*149009f2SKrzysztof Kozlowski 46*149009f2SKrzysztof Kozlowski clock-names: 47*149009f2SKrzysztof Kozlowski items: 48*149009f2SKrzysztof Kozlowski - const: core_clk 49*149009f2SKrzysztof Kozlowski - const: bus_aggr_clk 50*149009f2SKrzysztof Kozlowski - const: iface_clk 51*149009f2SKrzysztof Kozlowski - const: core_clk_unipro 52*149009f2SKrzysztof Kozlowski - const: ref_clk 53*149009f2SKrzysztof Kozlowski - const: tx_lane0_sync_clk 54*149009f2SKrzysztof Kozlowski - const: rx_lane0_sync_clk 55*149009f2SKrzysztof Kozlowski - const: rx_lane1_sync_clk 56*149009f2SKrzysztof Kozlowski 57*149009f2SKrzysztof Kozlowski qcom,ice: 58*149009f2SKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/phandle 59*149009f2SKrzysztof Kozlowski description: phandle to the Inline Crypto Engine node 60*149009f2SKrzysztof Kozlowski 61*149009f2SKrzysztof Kozlowskirequired: 62*149009f2SKrzysztof Kozlowski - compatible 63*149009f2SKrzysztof Kozlowski - reg 64*149009f2SKrzysztof Kozlowski 65*149009f2SKrzysztof KozlowskiallOf: 66*149009f2SKrzysztof Kozlowski - $ref: qcom,ufs-common.yaml 67*149009f2SKrzysztof Kozlowski 68*149009f2SKrzysztof KozlowskiunevaluatedProperties: false 69*149009f2SKrzysztof Kozlowski 70*149009f2SKrzysztof Kozlowskiexamples: 71*149009f2SKrzysztof Kozlowski - | 72*149009f2SKrzysztof Kozlowski #include <dt-bindings/clock/qcom,sm8650-gcc.h> 73*149009f2SKrzysztof Kozlowski #include <dt-bindings/clock/qcom,sm8650-tcsr.h> 74*149009f2SKrzysztof Kozlowski #include <dt-bindings/clock/qcom,rpmh.h> 75*149009f2SKrzysztof Kozlowski #include <dt-bindings/gpio/gpio.h> 76*149009f2SKrzysztof Kozlowski #include <dt-bindings/interconnect/qcom,icc.h> 77*149009f2SKrzysztof Kozlowski #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h> 78*149009f2SKrzysztof Kozlowski #include <dt-bindings/interrupt-controller/arm-gic.h> 79*149009f2SKrzysztof Kozlowski 80*149009f2SKrzysztof Kozlowski soc { 81*149009f2SKrzysztof Kozlowski #address-cells = <2>; 82*149009f2SKrzysztof Kozlowski #size-cells = <2>; 83*149009f2SKrzysztof Kozlowski 84*149009f2SKrzysztof Kozlowski ufshc@1d84000 { 85*149009f2SKrzysztof Kozlowski compatible = "qcom,sm8650-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; 86*149009f2SKrzysztof Kozlowski reg = <0x0 0x01d84000 0x0 0x3000>; 87*149009f2SKrzysztof Kozlowski 88*149009f2SKrzysztof Kozlowski interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>; 89*149009f2SKrzysztof Kozlowski 90*149009f2SKrzysztof Kozlowski clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, 91*149009f2SKrzysztof Kozlowski <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 92*149009f2SKrzysztof Kozlowski <&gcc GCC_UFS_PHY_AHB_CLK>, 93*149009f2SKrzysztof Kozlowski <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 94*149009f2SKrzysztof Kozlowski <&tcsr TCSR_UFS_PAD_CLKREF_EN>, 95*149009f2SKrzysztof Kozlowski <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 96*149009f2SKrzysztof Kozlowski <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 97*149009f2SKrzysztof Kozlowski <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 98*149009f2SKrzysztof Kozlowski clock-names = "core_clk", 99*149009f2SKrzysztof Kozlowski "bus_aggr_clk", 100*149009f2SKrzysztof Kozlowski "iface_clk", 101*149009f2SKrzysztof Kozlowski "core_clk_unipro", 102*149009f2SKrzysztof Kozlowski "ref_clk", 103*149009f2SKrzysztof Kozlowski "tx_lane0_sync_clk", 104*149009f2SKrzysztof Kozlowski "rx_lane0_sync_clk", 105*149009f2SKrzysztof Kozlowski "rx_lane1_sync_clk"; 106*149009f2SKrzysztof Kozlowski 107*149009f2SKrzysztof Kozlowski resets = <&gcc GCC_UFS_PHY_BCR>; 108*149009f2SKrzysztof Kozlowski reset-names = "rst"; 109*149009f2SKrzysztof Kozlowski reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; 110*149009f2SKrzysztof Kozlowski 111*149009f2SKrzysztof Kozlowski interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS 112*149009f2SKrzysztof Kozlowski &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, 113*149009f2SKrzysztof Kozlowski <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY 114*149009f2SKrzysztof Kozlowski &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; 115*149009f2SKrzysztof Kozlowski interconnect-names = "ufs-ddr", 116*149009f2SKrzysztof Kozlowski "cpu-ufs"; 117*149009f2SKrzysztof Kozlowski 118*149009f2SKrzysztof Kozlowski power-domains = <&gcc UFS_PHY_GDSC>; 119*149009f2SKrzysztof Kozlowski required-opps = <&rpmhpd_opp_nom>; 120*149009f2SKrzysztof Kozlowski 121*149009f2SKrzysztof Kozlowski operating-points-v2 = <&ufs_opp_table>; 122*149009f2SKrzysztof Kozlowski 123*149009f2SKrzysztof Kozlowski iommus = <&apps_smmu 0x60 0>; 124*149009f2SKrzysztof Kozlowski 125*149009f2SKrzysztof Kozlowski lanes-per-direction = <2>; 126*149009f2SKrzysztof Kozlowski qcom,ice = <&ice>; 127*149009f2SKrzysztof Kozlowski 128*149009f2SKrzysztof Kozlowski phys = <&ufs_mem_phy>; 129*149009f2SKrzysztof Kozlowski phy-names = "ufsphy"; 130*149009f2SKrzysztof Kozlowski 131*149009f2SKrzysztof Kozlowski #reset-cells = <1>; 132*149009f2SKrzysztof Kozlowski 133*149009f2SKrzysztof Kozlowski vcc-supply = <&vreg_l7b_2p5>; 134*149009f2SKrzysztof Kozlowski vcc-max-microamp = <1100000>; 135*149009f2SKrzysztof Kozlowski vccq-supply = <&vreg_l9b_1p2>; 136*149009f2SKrzysztof Kozlowski vccq-max-microamp = <1200000>; 137*149009f2SKrzysztof Kozlowski 138*149009f2SKrzysztof Kozlowski ufs_opp_table: opp-table { 139*149009f2SKrzysztof Kozlowski compatible = "operating-points-v2"; 140*149009f2SKrzysztof Kozlowski 141*149009f2SKrzysztof Kozlowski opp-100000000 { 142*149009f2SKrzysztof Kozlowski opp-hz = /bits/ 64 <100000000>, 143*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 144*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 145*149009f2SKrzysztof Kozlowski /bits/ 64 <100000000>, 146*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 147*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 148*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 149*149009f2SKrzysztof Kozlowski /bits/ 64 <0>; 150*149009f2SKrzysztof Kozlowski required-opps = <&rpmhpd_opp_low_svs>; 151*149009f2SKrzysztof Kozlowski }; 152*149009f2SKrzysztof Kozlowski 153*149009f2SKrzysztof Kozlowski opp-201500000 { 154*149009f2SKrzysztof Kozlowski opp-hz = /bits/ 64 <201500000>, 155*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 156*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 157*149009f2SKrzysztof Kozlowski /bits/ 64 <201500000>, 158*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 159*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 160*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 161*149009f2SKrzysztof Kozlowski /bits/ 64 <0>; 162*149009f2SKrzysztof Kozlowski required-opps = <&rpmhpd_opp_svs>; 163*149009f2SKrzysztof Kozlowski }; 164*149009f2SKrzysztof Kozlowski 165*149009f2SKrzysztof Kozlowski opp-403000000 { 166*149009f2SKrzysztof Kozlowski opp-hz = /bits/ 64 <403000000>, 167*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 168*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 169*149009f2SKrzysztof Kozlowski /bits/ 64 <403000000>, 170*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 171*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 172*149009f2SKrzysztof Kozlowski /bits/ 64 <0>, 173*149009f2SKrzysztof Kozlowski /bits/ 64 <0>; 174*149009f2SKrzysztof Kozlowski required-opps = <&rpmhpd_opp_nom>; 175*149009f2SKrzysztof Kozlowski }; 176*149009f2SKrzysztof Kozlowski }; 177*149009f2SKrzysztof Kozlowski }; 178*149009f2SKrzysztof Kozlowski }; 179