1Synopsys ARC Local Timer with Interrupt Capabilities 2- Found on all ARC CPUs (ARC700/ARCHS) 3- Can be optionally programmed to interrupt on Limit 4- Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically 5 TIMER0 used as clockevent provider (true for all ARC cores) 6 TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS) 7 8Required properties: 9 10- compatible : should be "snps,arc-timer" 11- interrupts : single Interrupt going into parent intc 12 (16 for ARCHS cores, 3 for ARC700 cores) 13- clocks : phandle to the source clock 14 15Example: 16 17 timer0 { 18 compatible = "snps,arc-timer"; 19 interrupts = <3>; 20 interrupt-parent = <&core_intc>; 21 clocks = <&core_clk>; 22 }; 23 24 timer1 { 25 compatible = "snps,arc-timer"; 26 clocks = <&core_clk>; 27 }; 28