xref: /linux/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml (revision 79d2e1919a2728ef49d938eb20ebd5903c14dfb0) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos SoC Multi Core Timer (MCT)
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description: |+
13  The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
14  global timer and CPU local timers. The global timer is a 64-bit free running
15  up-counter and can generate 4 interrupts when the counter reaches one of the
16  four preset counter values. The CPU local timers are 32-bit free running
17  down-counters and generate an interrupt when the counter expires. There is
18  one CPU local timer instantiated in MCT for every CPU in the system.
19
20properties:
21  compatible:
22    oneOf:
23      - enum:
24          - samsung,exynos4210-mct
25          - samsung,exynos4412-mct
26      - items:
27          - enum:
28              - axis,artpec8-mct
29              - google,gs101-mct
30              - samsung,exynos3250-mct
31              - samsung,exynos5250-mct
32              - samsung,exynos5260-mct
33              - samsung,exynos5420-mct
34              - samsung,exynos5433-mct
35              - samsung,exynos850-mct
36              - samsung,exynos8895-mct
37              - tesla,fsd-mct
38          - const: samsung,exynos4210-mct
39
40  clocks:
41    maxItems: 2
42
43  clock-names:
44    items:
45      - const: fin_pll
46      - const: mct
47
48  reg:
49    maxItems: 1
50
51  samsung,frc-shared:
52    type: boolean
53    description: |
54      Indicates that the hardware requires that this processor share the
55      free-running counter with a different (main) processor.
56
57  samsung,local-timers:
58    $ref: /schemas/types.yaml#/definitions/uint32-array
59    minItems: 1
60    maxItems: 16
61    description: |
62      List of indices of local timers usable from this processor.
63
64  interrupts:
65    description: |
66      Interrupts should be put in specific order. This is, the local timer
67      interrupts should be specified after the four global timer interrupts
68      have been specified:
69      0: Global Timer Interrupt 0
70      1: Global Timer Interrupt 1
71      2: Global Timer Interrupt 2
72      3: Global Timer Interrupt 3
73      4: Local Timer Interrupt 0
74      5: Local Timer Interrupt 1
75      6: ..
76      7: ..
77      i: Local Timer Interrupt n
78      For MCT block that uses a per-processor interrupt for local timers, such
79      as ones compatible with "samsung,exynos4412-mct", only one local timer
80      interrupt might be specified, meaning that all local timers use the same
81      per processor interrupt.
82    minItems: 5               # 4 Global + 1 local
83    maxItems: 20              # 4 Global + 16 local
84
85required:
86  - compatible
87  - clock-names
88  - clocks
89  - interrupts
90  - reg
91
92allOf:
93  - if:
94      not:
95        properties:
96          compatible:
97            contains:
98              enum:
99                - axis,artpec8-mct
100    then:
101      properties:
102        samsung,local-timers: false
103        samsung,frc-shared: false
104  - if:
105      properties:
106        compatible:
107          contains:
108            const: samsung,exynos3250-mct
109    then:
110      properties:
111        interrupts:
112          minItems: 8
113          maxItems: 8
114
115  - if:
116      properties:
117        compatible:
118          contains:
119            const: samsung,exynos5250-mct
120    then:
121      properties:
122        interrupts:
123          minItems: 6
124          maxItems: 6
125
126  - if:
127      properties:
128        compatible:
129          contains:
130            enum:
131              - axis,artpec8-mct
132              - google,gs101-mct
133              - samsung,exynos5260-mct
134              - samsung,exynos5420-mct
135              - samsung,exynos5433-mct
136              - samsung,exynos850-mct
137              - samsung,exynos8895-mct
138    then:
139      properties:
140        interrupts:
141          minItems: 12
142          maxItems: 12
143
144  - if:
145      properties:
146        compatible:
147          contains:
148            enum:
149              - tesla,fsd-mct
150    then:
151      properties:
152        interrupts:
153          minItems: 16
154          maxItems: 16
155
156additionalProperties: false
157
158examples:
159  - |
160    // In this example, the IP contains two local timers, using separate
161    // interrupts, so two local timer interrupts have been specified,
162    // in addition to four global timer interrupts.
163    #include <dt-bindings/clock/exynos4.h>
164    #include <dt-bindings/interrupt-controller/arm-gic.h>
165
166    timer@10050000 {
167        compatible = "samsung,exynos4210-mct";
168        reg = <0x10050000 0x800>;
169        clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
170        clock-names = "fin_pll", "mct";
171
172        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
173                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
174                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
175                     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
176                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
177                     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
178    };
179
180  - |
181    // In this example, the timer interrupts are connected to two separate
182    // interrupt controllers. Hence, an interrupts-extended is needed.
183    #include <dt-bindings/clock/exynos4.h>
184    #include <dt-bindings/interrupt-controller/arm-gic.h>
185
186    timer@101c0000 {
187        compatible = "samsung,exynos4210-mct";
188        reg = <0x101C0000 0x800>;
189        clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
190        clock-names = "fin_pll", "mct";
191
192        interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
193                              <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
194                              <&combiner 12 6>,
195                              <&combiner 12 7>,
196                              <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
197                              <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
198    };
199
200  - |
201    // In this example, the IP contains four local timers, but using
202    // a per-processor interrupt to handle them. Only one first local
203    // interrupt is specified.
204    #include <dt-bindings/clock/exynos4.h>
205    #include <dt-bindings/interrupt-controller/arm-gic.h>
206
207    timer@10050000 {
208        compatible = "samsung,exynos4412-mct";
209        reg = <0x10050000 0x800>;
210        clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
211        clock-names = "fin_pll", "mct";
212
213        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
214                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
215                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
216                     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
217                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
218    };
219
220  - |
221    // In this example, the IP contains four local timers, but using
222    // a per-processor interrupt to handle them. All the local timer
223    // interrupts are specified.
224    #include <dt-bindings/clock/exynos4.h>
225    #include <dt-bindings/interrupt-controller/arm-gic.h>
226
227    timer@10050000 {
228        compatible = "samsung,exynos4412-mct";
229        reg = <0x10050000 0x800>;
230        clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
231        clock-names = "fin_pll", "mct";
232
233        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
234                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
235                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
236                     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
237                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
238                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
239                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
240                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
241    };
242