xref: /linux/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml (revision ead5d1f4d877e92c051e1a1ade623d0d30e71619) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos SoC Multi Core Timer (MCT)
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description: |+
13  The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
14  global timer and CPU local timers. The global timer is a 64-bit free running
15  up-counter and can generate 4 interrupts when the counter reaches one of the
16  four preset counter values. The CPU local timers are 32-bit free running
17  down-counters and generate an interrupt when the counter expires. There is
18  one CPU local timer instantiated in MCT for every CPU in the system.
19
20properties:
21  compatible:
22    enum:
23      - samsung,exynos4210-mct
24      - samsung,exynos4412-mct
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    description: |
31      Interrupts should be put in specific order. This is, the local timer
32      interrupts should be specified after the four global timer interrupts
33      have been specified:
34      0: Global Timer Interrupt 0
35      1: Global Timer Interrupt 1
36      2: Global Timer Interrupt 2
37      3: Global Timer Interrupt 3
38      4: Local Timer Interrupt 0
39      5: Local Timer Interrupt 1
40      6: ..
41      7: ..
42      i: Local Timer Interrupt n
43      For MCT block that uses a per-processor interrupt for local timers, such
44      as ones compatible with "samsung,exynos4412-mct", only one local timer
45      interrupt might be specified, meaning that all local timers use the same
46      per processor interrupt.
47    minItems: 5               # 4 Global + 1 local
48    maxItems: 20              # 4 Global + 16 local
49
50required:
51  - compatible
52  - interrupts
53  - reg
54
55additionalProperties: false
56
57examples:
58  - |
59    // In this example, the IP contains two local timers, using separate
60    // interrupts, so two local timer interrupts have been specified,
61    // in addition to four global timer interrupts.
62    #include <dt-bindings/interrupt-controller/arm-gic.h>
63
64    timer@10050000 {
65        compatible = "samsung,exynos4210-mct";
66        reg = <0x10050000 0x800>;
67        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
68                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
69                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
70                     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
71                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
72                     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
73    };
74
75  - |
76    // In this example, the timer interrupts are connected to two separate
77    // interrupt controllers. Hence, an interrupts-extended is needed.
78    #include <dt-bindings/interrupt-controller/arm-gic.h>
79
80    timer@101c0000 {
81        compatible = "samsung,exynos4210-mct";
82        reg = <0x101C0000 0x800>;
83        interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
84                              <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
85                              <&combiner 12 6>,
86                              <&combiner 12 7>,
87                              <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
88                              <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
89    };
90
91  - |
92    // In this example, the IP contains four local timers, but using
93    // a per-processor interrupt to handle them. Only one first local
94    // interrupt is specified.
95    #include <dt-bindings/interrupt-controller/arm-gic.h>
96
97    timer@10050000 {
98        compatible = "samsung,exynos4412-mct";
99        reg = <0x10050000 0x800>;
100
101        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
102                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
103                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
104                     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
105                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
106    };
107
108  - |
109    // In this example, the IP contains four local timers, but using
110    // a per-processor interrupt to handle them. All the local timer
111    // interrupts are specified.
112    #include <dt-bindings/interrupt-controller/arm-gic.h>
113
114    timer@10050000 {
115        compatible = "samsung,exynos4412-mct";
116        reg = <0x10050000 0x800>;
117
118        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
119                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
120                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
121                     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
122                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
123                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
124                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
125                     <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
126    };
127