1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung Exynos SoC Multi Core Timer (MCT) 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12description: |+ 13 The Samsung's Multi Core Timer (MCT) module includes two main blocks, the 14 global timer and CPU local timers. The global timer is a 64-bit free running 15 up-counter and can generate 4 interrupts when the counter reaches one of the 16 four preset counter values. The CPU local timers are 32-bit free running 17 down-counters and generate an interrupt when the counter expires. There is 18 one CPU local timer instantiated in MCT for every CPU in the system. 19 20properties: 21 compatible: 22 oneOf: 23 - enum: 24 - samsung,exynos4210-mct 25 - samsung,exynos4412-mct 26 - items: 27 - enum: 28 - samsung,exynos3250-mct 29 - samsung,exynos5250-mct 30 - samsung,exynos5260-mct 31 - samsung,exynos5420-mct 32 - samsung,exynos5433-mct 33 - samsung,exynos850-mct 34 - tesla,fsd-mct 35 - const: samsung,exynos4210-mct 36 37 clocks: 38 minItems: 2 39 maxItems: 2 40 41 clock-names: 42 items: 43 - pattern: "^(fin_pll|mct)$" 44 - pattern: "^(fin_pll|mct)$" 45 46 reg: 47 maxItems: 1 48 49 interrupts: 50 description: | 51 Interrupts should be put in specific order. This is, the local timer 52 interrupts should be specified after the four global timer interrupts 53 have been specified: 54 0: Global Timer Interrupt 0 55 1: Global Timer Interrupt 1 56 2: Global Timer Interrupt 2 57 3: Global Timer Interrupt 3 58 4: Local Timer Interrupt 0 59 5: Local Timer Interrupt 1 60 6: .. 61 7: .. 62 i: Local Timer Interrupt n 63 For MCT block that uses a per-processor interrupt for local timers, such 64 as ones compatible with "samsung,exynos4412-mct", only one local timer 65 interrupt might be specified, meaning that all local timers use the same 66 per processor interrupt. 67 minItems: 5 # 4 Global + 1 local 68 maxItems: 20 # 4 Global + 16 local 69 70required: 71 - compatible 72 - clock-names 73 - clocks 74 - interrupts 75 - reg 76 77allOf: 78 - if: 79 properties: 80 compatible: 81 contains: 82 const: samsung,exynos3250-mct 83 then: 84 properties: 85 interrupts: 86 minItems: 8 87 maxItems: 8 88 89 - if: 90 properties: 91 compatible: 92 contains: 93 const: samsung,exynos5250-mct 94 then: 95 properties: 96 interrupts: 97 minItems: 6 98 maxItems: 6 99 100 - if: 101 properties: 102 compatible: 103 contains: 104 enum: 105 - samsung,exynos5260-mct 106 - samsung,exynos5420-mct 107 - samsung,exynos5433-mct 108 - samsung,exynos850-mct 109 then: 110 properties: 111 interrupts: 112 minItems: 12 113 maxItems: 12 114 115 - if: 116 properties: 117 compatible: 118 contains: 119 enum: 120 - tesla,fsd-mct 121 then: 122 properties: 123 interrupts: 124 minItems: 16 125 maxItems: 16 126 127additionalProperties: false 128 129examples: 130 - | 131 // In this example, the IP contains two local timers, using separate 132 // interrupts, so two local timer interrupts have been specified, 133 // in addition to four global timer interrupts. 134 #include <dt-bindings/clock/exynos4.h> 135 #include <dt-bindings/interrupt-controller/arm-gic.h> 136 137 timer@10050000 { 138 compatible = "samsung,exynos4210-mct"; 139 reg = <0x10050000 0x800>; 140 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 141 clock-names = "fin_pll", "mct"; 142 143 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 144 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 145 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 146 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 147 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 148 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 149 }; 150 151 - | 152 // In this example, the timer interrupts are connected to two separate 153 // interrupt controllers. Hence, an interrupts-extended is needed. 154 #include <dt-bindings/clock/exynos4.h> 155 #include <dt-bindings/interrupt-controller/arm-gic.h> 156 157 timer@101c0000 { 158 compatible = "samsung,exynos4210-mct"; 159 reg = <0x101C0000 0x800>; 160 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 161 clock-names = "fin_pll", "mct"; 162 163 interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 164 <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 165 <&combiner 12 6>, 166 <&combiner 12 7>, 167 <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 168 <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 169 }; 170 171 - | 172 // In this example, the IP contains four local timers, but using 173 // a per-processor interrupt to handle them. Only one first local 174 // interrupt is specified. 175 #include <dt-bindings/clock/exynos4.h> 176 #include <dt-bindings/interrupt-controller/arm-gic.h> 177 178 timer@10050000 { 179 compatible = "samsung,exynos4412-mct"; 180 reg = <0x10050000 0x800>; 181 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 182 clock-names = "fin_pll", "mct"; 183 184 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 185 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 186 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 187 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 188 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>; 189 }; 190 191 - | 192 // In this example, the IP contains four local timers, but using 193 // a per-processor interrupt to handle them. All the local timer 194 // interrupts are specified. 195 #include <dt-bindings/clock/exynos4.h> 196 #include <dt-bindings/interrupt-controller/arm-gic.h> 197 198 timer@10050000 { 199 compatible = "samsung,exynos4412-mct"; 200 reg = <0x10050000 0x800>; 201 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 202 clock-names = "fin_pll", "mct"; 203 204 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 205 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 206 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 207 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 208 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>, 209 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>, 210 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>, 211 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>; 212 }; 213