1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung Exynos SoC Multi Core Timer (MCT) 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12description: |+ 13 The Samsung's Multi Core Timer (MCT) module includes two main blocks, the 14 global timer and CPU local timers. The global timer is a 64-bit free running 15 up-counter and can generate 4 interrupts when the counter reaches one of the 16 four preset counter values. The CPU local timers are 32-bit free running 17 down-counters and generate an interrupt when the counter expires. There is 18 one CPU local timer instantiated in MCT for every CPU in the system. 19 20properties: 21 compatible: 22 oneOf: 23 - enum: 24 - samsung,exynos4210-mct 25 - samsung,exynos4412-mct 26 - items: 27 - enum: 28 - samsung,exynos3250-mct 29 - samsung,exynos5250-mct 30 - samsung,exynos5260-mct 31 - samsung,exynos5420-mct 32 - samsung,exynos5433-mct 33 - samsung,exynos850-mct 34 - tesla,fsd-mct 35 - const: samsung,exynos4210-mct 36 37 clocks: 38 maxItems: 2 39 40 clock-names: 41 items: 42 - const: fin_pll 43 - const: mct 44 45 reg: 46 maxItems: 1 47 48 interrupts: 49 description: | 50 Interrupts should be put in specific order. This is, the local timer 51 interrupts should be specified after the four global timer interrupts 52 have been specified: 53 0: Global Timer Interrupt 0 54 1: Global Timer Interrupt 1 55 2: Global Timer Interrupt 2 56 3: Global Timer Interrupt 3 57 4: Local Timer Interrupt 0 58 5: Local Timer Interrupt 1 59 6: .. 60 7: .. 61 i: Local Timer Interrupt n 62 For MCT block that uses a per-processor interrupt for local timers, such 63 as ones compatible with "samsung,exynos4412-mct", only one local timer 64 interrupt might be specified, meaning that all local timers use the same 65 per processor interrupt. 66 minItems: 5 # 4 Global + 1 local 67 maxItems: 20 # 4 Global + 16 local 68 69required: 70 - compatible 71 - clock-names 72 - clocks 73 - interrupts 74 - reg 75 76allOf: 77 - if: 78 properties: 79 compatible: 80 contains: 81 const: samsung,exynos3250-mct 82 then: 83 properties: 84 interrupts: 85 minItems: 8 86 maxItems: 8 87 88 - if: 89 properties: 90 compatible: 91 contains: 92 const: samsung,exynos5250-mct 93 then: 94 properties: 95 interrupts: 96 minItems: 6 97 maxItems: 6 98 99 - if: 100 properties: 101 compatible: 102 contains: 103 enum: 104 - samsung,exynos5260-mct 105 - samsung,exynos5420-mct 106 - samsung,exynos5433-mct 107 - samsung,exynos850-mct 108 then: 109 properties: 110 interrupts: 111 minItems: 12 112 maxItems: 12 113 114 - if: 115 properties: 116 compatible: 117 contains: 118 enum: 119 - tesla,fsd-mct 120 then: 121 properties: 122 interrupts: 123 minItems: 16 124 maxItems: 16 125 126additionalProperties: false 127 128examples: 129 - | 130 // In this example, the IP contains two local timers, using separate 131 // interrupts, so two local timer interrupts have been specified, 132 // in addition to four global timer interrupts. 133 #include <dt-bindings/clock/exynos4.h> 134 #include <dt-bindings/interrupt-controller/arm-gic.h> 135 136 timer@10050000 { 137 compatible = "samsung,exynos4210-mct"; 138 reg = <0x10050000 0x800>; 139 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 140 clock-names = "fin_pll", "mct"; 141 142 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 143 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 144 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 145 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 146 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 147 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 148 }; 149 150 - | 151 // In this example, the timer interrupts are connected to two separate 152 // interrupt controllers. Hence, an interrupts-extended is needed. 153 #include <dt-bindings/clock/exynos4.h> 154 #include <dt-bindings/interrupt-controller/arm-gic.h> 155 156 timer@101c0000 { 157 compatible = "samsung,exynos4210-mct"; 158 reg = <0x101C0000 0x800>; 159 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 160 clock-names = "fin_pll", "mct"; 161 162 interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 163 <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 164 <&combiner 12 6>, 165 <&combiner 12 7>, 166 <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 167 <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 168 }; 169 170 - | 171 // In this example, the IP contains four local timers, but using 172 // a per-processor interrupt to handle them. Only one first local 173 // interrupt is specified. 174 #include <dt-bindings/clock/exynos4.h> 175 #include <dt-bindings/interrupt-controller/arm-gic.h> 176 177 timer@10050000 { 178 compatible = "samsung,exynos4412-mct"; 179 reg = <0x10050000 0x800>; 180 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 181 clock-names = "fin_pll", "mct"; 182 183 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 184 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 185 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 186 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 187 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>; 188 }; 189 190 - | 191 // In this example, the IP contains four local timers, but using 192 // a per-processor interrupt to handle them. All the local timer 193 // interrupts are specified. 194 #include <dt-bindings/clock/exynos4.h> 195 #include <dt-bindings/interrupt-controller/arm-gic.h> 196 197 timer@10050000 { 198 compatible = "samsung,exynos4412-mct"; 199 reg = <0x10050000 0x800>; 200 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; 201 clock-names = "fin_pll", "mct"; 202 203 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 204 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 205 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 206 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, 207 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>, 208 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>, 209 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>, 210 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>; 211 }; 212