1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/timer/renesas,tmu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas R-Mobile/R-Car Timer Unit (TMU) 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 12 13description: 14 The TMU is a 32-bit timer/counter with configurable clock inputs and 15 programmable compare match. 16 17 Channels share hardware resources but their counter and compare match value 18 are independent. The TMU hardware supports up to three channels. 19 20properties: 21 compatible: 22 items: 23 - enum: 24 - renesas,tmu-r8a7740 # R-Mobile A1 25 - renesas,tmu-r8a774a1 # RZ/G2M 26 - renesas,tmu-r8a774b1 # RZ/G2N 27 - renesas,tmu-r8a774c0 # RZ/G2E 28 - renesas,tmu-r8a774e1 # RZ/G2H 29 - renesas,tmu-r8a7778 # R-Car M1A 30 - renesas,tmu-r8a7779 # R-Car H1 31 - renesas,tmu-r8a77970 # R-Car V3M 32 - renesas,tmu-r8a77980 # R-Car V3H 33 - const: renesas,tmu 34 35 reg: 36 maxItems: 1 37 38 interrupts: 39 minItems: 2 40 maxItems: 3 41 42 clocks: 43 maxItems: 1 44 45 clock-names: 46 const: fck 47 48 power-domains: 49 maxItems: 1 50 51 resets: 52 maxItems: 1 53 54 '#renesas,channels': 55 description: 56 Number of channels implemented by the timer. 57 $ref: /schemas/types.yaml#/definitions/uint32 58 enum: [ 2, 3 ] 59 default: 3 60 61required: 62 - compatible 63 - reg 64 - interrupts 65 - clocks 66 - clock-names 67 - power-domains 68 69if: 70 not: 71 properties: 72 compatible: 73 contains: 74 enum: 75 - renesas,tmu-r8a7740 76 - renesas,tmu-r8a7778 77 - renesas,tmu-r8a7779 78then: 79 required: 80 - resets 81 82additionalProperties: false 83 84examples: 85 - | 86 #include <dt-bindings/clock/r8a7779-clock.h> 87 #include <dt-bindings/interrupt-controller/arm-gic.h> 88 #include <dt-bindings/power/r8a7779-sysc.h> 89 tmu0: timer@ffd80000 { 90 compatible = "renesas,tmu-r8a7779", "renesas,tmu"; 91 reg = <0xffd80000 0x30>; 92 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 93 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 94 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 95 clocks = <&mstp0_clks R8A7779_CLK_TMU0>; 96 clock-names = "fck"; 97 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; 98 #renesas,channels = <3>; 99 }; 100