xref: /linux/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Low Power Timer/Pulse Width Modulation Module (TPM)
8
9maintainers:
10  - Dong Aisheng <aisheng.dong@nxp.com>
11
12description: |
13  The Timer/PWM Module (TPM) supports input capture, output compare,
14  and the generation of PWM signals to control electric motor and power
15  management applications. The counter, compare and capture registers
16  are clocked by an asynchronous clock that can remain enabled in low
17  power modes. TPM can support global counter bus where one TPM drives
18  the counter bus for the others, provided bit width is the same.
19
20properties:
21  compatible:
22    const: fsl,imx7ulp-tpm
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    items:
32      - description: SoC TPM ipg clock
33      - description: SoC TPM per clock
34
35  clock-names:
36    items:
37      - const: ipg
38      - const: per
39
40required:
41  - compatible
42  - reg
43  - interrupts
44  - clocks
45  - clock-names
46
47additionalProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/clock/imx7ulp-clock.h>
52    #include <dt-bindings/interrupt-controller/arm-gic.h>
53
54    timer@40260000 {
55        compatible = "fsl,imx7ulp-tpm";
56        reg = <0x40260000 0x1000>;
57        interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
58        clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
59                 <&pcc2 IMX7ULP_CLK_LPTPM5>;
60        clock-names = "ipg", "per";
61    };
62