xref: /linux/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml (revision 7e3e6e1b75c9643e25e8ca7d6caf1b1faf8f022e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP System Counter Module(sys_ctr)
8
9maintainers:
10  - Bai Ping <ping.bai@nxp.com>
11
12description: |
13  The system counter(sys_ctr) is a programmable system counter
14  which provides a shared time base to Cortex A15, A7, A53, A73,
15  etc. it is intended for use in applications where the counter
16  is always powered and support multiple, unrelated clocks. The
17  compare frame inside can be used for timer purpose.
18
19properties:
20  compatible:
21    const: nxp,sysctr-timer
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    maxItems: 1
28
29  clocks:
30    maxItems: 1
31
32  clock-names:
33    const: per
34
35  nxp,no-divider:
36    description: if present, means there is no internal base clk divider.
37    type: boolean
38
39required:
40  - compatible
41  - reg
42  - interrupts
43  - clocks
44  - clock-names
45
46additionalProperties: false
47
48examples:
49  - |
50    #include <dt-bindings/interrupt-controller/arm-gic.h>
51
52    timer@306a0000 {
53        compatible = "nxp,sysctr-timer";
54        reg = <0x306a0000 0x20000>;
55        clocks = <&clk_8m>;
56        clock-names = "per";
57        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
58     };
59