xref: /linux/Documentation/devicetree/bindings/timer/loongson,ls1x-pwmtimer.yaml (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*b25efff2SKeguang Zhang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*b25efff2SKeguang Zhang%YAML 1.2
3*b25efff2SKeguang Zhang---
4*b25efff2SKeguang Zhang$id: http://devicetree.org/schemas/timer/loongson,ls1x-pwmtimer.yaml#
5*b25efff2SKeguang Zhang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*b25efff2SKeguang Zhang
7*b25efff2SKeguang Zhangtitle: Loongson-1 PWM timer
8*b25efff2SKeguang Zhang
9*b25efff2SKeguang Zhangmaintainers:
10*b25efff2SKeguang Zhang  - Keguang Zhang <keguang.zhang@gmail.com>
11*b25efff2SKeguang Zhang
12*b25efff2SKeguang Zhangdescription:
13*b25efff2SKeguang Zhang  Loongson-1 PWM timer can be used for system clock source
14*b25efff2SKeguang Zhang  and clock event timers.
15*b25efff2SKeguang Zhang
16*b25efff2SKeguang Zhangproperties:
17*b25efff2SKeguang Zhang  compatible:
18*b25efff2SKeguang Zhang    const: loongson,ls1b-pwmtimer
19*b25efff2SKeguang Zhang
20*b25efff2SKeguang Zhang  reg:
21*b25efff2SKeguang Zhang    maxItems: 1
22*b25efff2SKeguang Zhang
23*b25efff2SKeguang Zhang  clocks:
24*b25efff2SKeguang Zhang    maxItems: 1
25*b25efff2SKeguang Zhang
26*b25efff2SKeguang Zhang  interrupts:
27*b25efff2SKeguang Zhang    maxItems: 1
28*b25efff2SKeguang Zhang
29*b25efff2SKeguang Zhangrequired:
30*b25efff2SKeguang Zhang  - compatible
31*b25efff2SKeguang Zhang  - reg
32*b25efff2SKeguang Zhang  - clocks
33*b25efff2SKeguang Zhang  - interrupts
34*b25efff2SKeguang Zhang
35*b25efff2SKeguang ZhangadditionalProperties: false
36*b25efff2SKeguang Zhang
37*b25efff2SKeguang Zhangexamples:
38*b25efff2SKeguang Zhang  - |
39*b25efff2SKeguang Zhang    #include <dt-bindings/clock/loongson,ls1x-clk.h>
40*b25efff2SKeguang Zhang    #include <dt-bindings/interrupt-controller/irq.h>
41*b25efff2SKeguang Zhang    clocksource: timer@1fe5c030 {
42*b25efff2SKeguang Zhang        compatible = "loongson,ls1b-pwmtimer";
43*b25efff2SKeguang Zhang        reg = <0x1fe5c030 0x10>;
44*b25efff2SKeguang Zhang
45*b25efff2SKeguang Zhang        clocks = <&clkc LS1X_CLKID_APB>;
46*b25efff2SKeguang Zhang        interrupt-parent = <&intc0>;
47*b25efff2SKeguang Zhang        interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
48*b25efff2SKeguang Zhang    };
49