xref: /linux/Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1bf5c3ae1SBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2bf5c3ae1SBenjamin Gaignard%YAML 1.2
3bf5c3ae1SBenjamin Gaignard---
4bf5c3ae1SBenjamin Gaignard$id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml#
5bf5c3ae1SBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml#
6bf5c3ae1SBenjamin Gaignard
784e85359SKrzysztof Kozlowskititle: STMicroelectronics STM32 digital thermal sensor (DTS)
8bf5c3ae1SBenjamin Gaignard
9bf5c3ae1SBenjamin Gaignardmaintainers:
10f4eedebdSPatrice Chotard  - Pascal Paillet <p.paillet@foss.st.com>
11bf5c3ae1SBenjamin Gaignard
12*17cdc471SKrzysztof Kozlowski$ref: thermal-sensor.yaml#
13*17cdc471SKrzysztof Kozlowski
14bf5c3ae1SBenjamin Gaignardproperties:
15bf5c3ae1SBenjamin Gaignard  compatible:
16bf5c3ae1SBenjamin Gaignard    const: st,stm32-thermal
17bf5c3ae1SBenjamin Gaignard
18bf5c3ae1SBenjamin Gaignard  reg:
19bf5c3ae1SBenjamin Gaignard    maxItems: 1
20bf5c3ae1SBenjamin Gaignard
21bf5c3ae1SBenjamin Gaignard  interrupts:
22bf5c3ae1SBenjamin Gaignard    maxItems: 1
23bf5c3ae1SBenjamin Gaignard
24bf5c3ae1SBenjamin Gaignard  clocks:
25bf5c3ae1SBenjamin Gaignard    maxItems: 1
26bf5c3ae1SBenjamin Gaignard
27bf5c3ae1SBenjamin Gaignard  clock-names:
28bf5c3ae1SBenjamin Gaignard    items:
29bf5c3ae1SBenjamin Gaignard      - const: pclk
30bf5c3ae1SBenjamin Gaignard
31bf5c3ae1SBenjamin Gaignard  "#thermal-sensor-cells":
32bf5c3ae1SBenjamin Gaignard    const: 0
33bf5c3ae1SBenjamin Gaignard
34bf5c3ae1SBenjamin Gaignardrequired:
35bf5c3ae1SBenjamin Gaignard  - compatible
36bf5c3ae1SBenjamin Gaignard  - reg
37bf5c3ae1SBenjamin Gaignard  - interrupts
38bf5c3ae1SBenjamin Gaignard  - clocks
39bf5c3ae1SBenjamin Gaignard  - clock-names
40bf5c3ae1SBenjamin Gaignard
41*17cdc471SKrzysztof KozlowskiunevaluatedProperties: false
42bf5c3ae1SBenjamin Gaignard
43bf5c3ae1SBenjamin Gaignardexamples:
44bf5c3ae1SBenjamin Gaignard  - |
45bf5c3ae1SBenjamin Gaignard    #include <dt-bindings/interrupt-controller/arm-gic.h>
46bf5c3ae1SBenjamin Gaignard    #include <dt-bindings/clock/stm32mp1-clks.h>
47bf5c3ae1SBenjamin Gaignard    dts: thermal@50028000 {
48bf5c3ae1SBenjamin Gaignard        compatible = "st,stm32-thermal";
49bf5c3ae1SBenjamin Gaignard        reg = <0x50028000 0x100>;
50bf5c3ae1SBenjamin Gaignard        clocks = <&rcc TMPSENS>;
51bf5c3ae1SBenjamin Gaignard        clock-names = "pclk";
52bf5c3ae1SBenjamin Gaignard        #thermal-sensor-cells = <0>;
53bf5c3ae1SBenjamin Gaignard        interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
54bf5c3ae1SBenjamin Gaignard    };
55bf5c3ae1SBenjamin Gaignard
56bf5c3ae1SBenjamin Gaignard    thermal-zones {
57bf5c3ae1SBenjamin Gaignard        cpu_thermal: cpu-thermal {
58bf5c3ae1SBenjamin Gaignard            polling-delay-passive = <0>;
59bf5c3ae1SBenjamin Gaignard            polling-delay = <0>;
60bf5c3ae1SBenjamin Gaignard
61bf5c3ae1SBenjamin Gaignard            thermal-sensors = <&dts>;
62bf5c3ae1SBenjamin Gaignard            trips {
63bf5c3ae1SBenjamin Gaignard                cpu_alert1: cpu-alert1 {
64bf5c3ae1SBenjamin Gaignard                    temperature = <85000>;
65bf5c3ae1SBenjamin Gaignard                    hysteresis = <0>;
66bf5c3ae1SBenjamin Gaignard                    type = "passive";
67bf5c3ae1SBenjamin Gaignard                };
68bf5c3ae1SBenjamin Gaignard
69bf5c3ae1SBenjamin Gaignard                cpu_crit: cpu-crit {
70bf5c3ae1SBenjamin Gaignard                    temperature = <120000>;
71bf5c3ae1SBenjamin Gaignard                    hysteresis = <0>;
72bf5c3ae1SBenjamin Gaignard                    type = "critical";
73bf5c3ae1SBenjamin Gaignard                };
74bf5c3ae1SBenjamin Gaignard            };
75bf5c3ae1SBenjamin Gaignard
76bf5c3ae1SBenjamin Gaignard            cooling-maps {
77bf5c3ae1SBenjamin Gaignard            };
78bf5c3ae1SBenjamin Gaignard        };
79bf5c3ae1SBenjamin Gaignard    };
80bf5c3ae1SBenjamin Gaignard...
81