xref: /linux/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12$ref: thermal-sensor.yaml#
13
14properties:
15  compatible:
16    enum:
17      - rockchip,px30-tsadc
18      - rockchip,rk3228-tsadc
19      - rockchip,rk3288-tsadc
20      - rockchip,rk3328-tsadc
21      - rockchip,rk3368-tsadc
22      - rockchip,rk3399-tsadc
23      - rockchip,rk3568-tsadc
24      - rockchip,rk3576-tsadc
25      - rockchip,rk3588-tsadc
26      - rockchip,rv1108-tsadc
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  clocks:
35    minItems: 2
36    maxItems: 2
37
38  clock-names:
39    items:
40      - const: tsadc
41      - const: apb_pclk
42
43  nvmem-cells:
44    items:
45      - description: cell handle to where the trim's base temperature is stored
46      - description:
47          cell handle to where the trim's tenths of Celsius base value is stored
48
49  nvmem-cell-names:
50    items:
51      - const: trim_base
52      - const: trim_base_frac
53
54  resets:
55    minItems: 1
56    maxItems: 3
57
58  reset-names:
59    minItems: 1
60    items:
61      - const: tsadc-apb
62      - const: tsadc
63      - const: tsadc-phy
64
65  "#address-cells":
66    const: 1
67
68  "#size-cells":
69    const: 0
70
71  "#thermal-sensor-cells":
72    const: 1
73
74  rockchip,grf:
75    description: The phandle of the syscon node for the general register file.
76    $ref: /schemas/types.yaml#/definitions/phandle
77
78  rockchip,hw-tshut-temp:
79    description: The hardware-controlled shutdown temperature value.
80    $ref: /schemas/types.yaml#/definitions/uint32
81
82  rockchip,hw-tshut-mode:
83    description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
84    $ref: /schemas/types.yaml#/definitions/uint32
85    enum: [0, 1]
86
87  rockchip,hw-tshut-polarity:
88    description: The hardware-controlled active polarity 0:LOW 1:HIGH.
89    $ref: /schemas/types.yaml#/definitions/uint32
90    enum: [0, 1]
91
92patternProperties:
93  "@[0-9a-f]+$":
94    type: object
95    properties:
96      reg:
97        maxItems: 1
98        description: sensor ID, a.k.a. channel number
99
100      nvmem-cells:
101        items:
102          - description: handle of cell containing calibration data
103
104      nvmem-cell-names:
105        items:
106          - const: trim
107
108    required:
109      - reg
110
111    unevaluatedProperties: false
112
113required:
114  - compatible
115  - reg
116  - interrupts
117  - clocks
118  - clock-names
119  - resets
120
121allOf:
122  - if:
123      properties:
124        compatible:
125          contains:
126            enum:
127              - rockchip,px30-tsadc
128              - rockchip,rk3366-tsadc
129              - rockchip,rk3399-tsadc
130              - rockchip,rk3568-tsadc
131    then:
132      required:
133        - rockchip,grf
134    else:
135      properties:
136        rockchip,grf: false
137  - if:
138      not:
139        properties:
140          compatible:
141            contains:
142              const: rockchip,rk3568-tsadc
143    then:
144      properties:
145        nvmem-cells: false
146        nvmem-cell-names: false
147  - if:
148      not:
149        properties:
150          compatible:
151            contains:
152              enum:
153                - rockchip,rk3568-tsadc
154                - rockchip,rk3576-tsadc
155    then:
156      patternProperties:
157        "@[0-9a-f]+$": false
158
159unevaluatedProperties: false
160
161examples:
162  - |
163    #include <dt-bindings/interrupt-controller/arm-gic.h>
164    #include <dt-bindings/clock/rk3288-cru.h>
165
166    tsadc: tsadc@ff280000 {
167        compatible = "rockchip,rk3288-tsadc";
168        reg = <0xff280000 0x100>;
169        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
170        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
171        clock-names = "tsadc", "apb_pclk";
172        resets = <&cru SRST_TSADC>;
173        reset-names = "tsadc-apb";
174        #thermal-sensor-cells = <1>;
175        rockchip,hw-tshut-temp = <95000>;
176        rockchip,hw-tshut-mode = <0>;
177        rockchip,hw-tshut-polarity = <0>;
178    };
179