xref: /linux/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml (revision f700bf652b264f33b54d276e3f25de4e91afb0f7)
1*f700bf65SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*f700bf65SAnson Huang%YAML 1.2
3*f700bf65SAnson Huang---
4*f700bf65SAnson Huang$id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml#
5*f700bf65SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*f700bf65SAnson Huang
7*f700bf65SAnson Huangtitle: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
8*f700bf65SAnson Huang
9*f700bf65SAnson Huangmaintainers:
10*f700bf65SAnson Huang  - Anson Huang <Anson.Huang@nxp.com>
11*f700bf65SAnson Huang
12*f700bf65SAnson Huangproperties:
13*f700bf65SAnson Huang  compatible:
14*f700bf65SAnson Huang    description: |
15*f700bf65SAnson Huang      The version of the device is determined by the TMU IP Block Revision
16*f700bf65SAnson Huang      Register (IPBRR0) at offset 0x0BF8.
17*f700bf65SAnson Huang      Table of correspondences between IPBRR0 values and example chips:
18*f700bf65SAnson Huang            Value           Device
19*f700bf65SAnson Huang            ----------      -----
20*f700bf65SAnson Huang            0x01900102      T1040
21*f700bf65SAnson Huang    enum:
22*f700bf65SAnson Huang      - fsl,qoriq-tmu
23*f700bf65SAnson Huang      - fsl,imx8mq-tmu
24*f700bf65SAnson Huang
25*f700bf65SAnson Huang  reg:
26*f700bf65SAnson Huang    maxItems: 1
27*f700bf65SAnson Huang
28*f700bf65SAnson Huang  interrupts:
29*f700bf65SAnson Huang    maxItems: 1
30*f700bf65SAnson Huang
31*f700bf65SAnson Huang  fsl,tmu-range:
32*f700bf65SAnson Huang    $ref: '/schemas/types.yaml#/definitions/uint32-array'
33*f700bf65SAnson Huang    description: |
34*f700bf65SAnson Huang      The values to be programmed into TTRnCR, as specified by the SoC
35*f700bf65SAnson Huang      reference manual. The first cell is TTR0CR, the second is TTR1CR, etc.
36*f700bf65SAnson Huang    maxItems: 4
37*f700bf65SAnson Huang
38*f700bf65SAnson Huang  fsl,tmu-calibration:
39*f700bf65SAnson Huang    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
40*f700bf65SAnson Huang    description: |
41*f700bf65SAnson Huang      A list of cell pairs containing temperature calibration data, as
42*f700bf65SAnson Huang      specified by the SoC reference manual. The first cell of each pair
43*f700bf65SAnson Huang      is the value to be written to TTCFGR, and the second is the value
44*f700bf65SAnson Huang      to be written to TSCFGR.
45*f700bf65SAnson Huang    items:
46*f700bf65SAnson Huang      items:
47*f700bf65SAnson Huang        - description: value for TTCFGR
48*f700bf65SAnson Huang        - description: value for TSCFGR
49*f700bf65SAnson Huang    minItems: 1
50*f700bf65SAnson Huang    maxItems: 64
51*f700bf65SAnson Huang
52*f700bf65SAnson Huang  little-endian:
53*f700bf65SAnson Huang    description: |
54*f700bf65SAnson Huang      boolean, if present, the TMU registers are little endian. If absent,
55*f700bf65SAnson Huang      the default is big endian.
56*f700bf65SAnson Huang    type: boolean
57*f700bf65SAnson Huang
58*f700bf65SAnson Huang  clocks:
59*f700bf65SAnson Huang    maxItems: 1
60*f700bf65SAnson Huang
61*f700bf65SAnson Huang  "#thermal-sensor-cells":
62*f700bf65SAnson Huang    const: 1
63*f700bf65SAnson Huang
64*f700bf65SAnson Huangrequired:
65*f700bf65SAnson Huang  - compatible
66*f700bf65SAnson Huang  - reg
67*f700bf65SAnson Huang  - interrupts
68*f700bf65SAnson Huang  - fsl,tmu-range
69*f700bf65SAnson Huang  - fsl,tmu-calibration
70*f700bf65SAnson Huang  - '#thermal-sensor-cells'
71*f700bf65SAnson Huang
72*f700bf65SAnson HuangadditionalProperties: false
73*f700bf65SAnson Huang
74*f700bf65SAnson Huangexamples:
75*f700bf65SAnson Huang  - |
76*f700bf65SAnson Huang    tmu@f0000 {
77*f700bf65SAnson Huang        compatible = "fsl,qoriq-tmu";
78*f700bf65SAnson Huang        reg = <0xf0000 0x1000>;
79*f700bf65SAnson Huang        interrupts = <18 2 0 0>;
80*f700bf65SAnson Huang        fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81*f700bf65SAnson Huang        fsl,tmu-calibration = <0x00000000 0x00000025>,
82*f700bf65SAnson Huang                              <0x00000001 0x00000028>,
83*f700bf65SAnson Huang                              <0x00000002 0x0000002d>,
84*f700bf65SAnson Huang                              <0x00000003 0x00000031>,
85*f700bf65SAnson Huang                              <0x00000004 0x00000036>,
86*f700bf65SAnson Huang                              <0x00000005 0x0000003a>,
87*f700bf65SAnson Huang                              <0x00000006 0x00000040>,
88*f700bf65SAnson Huang                              <0x00000007 0x00000044>,
89*f700bf65SAnson Huang                              <0x00000008 0x0000004a>,
90*f700bf65SAnson Huang                              <0x00000009 0x0000004f>,
91*f700bf65SAnson Huang                              <0x0000000a 0x00000054>,
92*f700bf65SAnson Huang                              <0x00010000 0x0000000d>,
93*f700bf65SAnson Huang                              <0x00010001 0x00000013>,
94*f700bf65SAnson Huang                              <0x00010002 0x00000019>,
95*f700bf65SAnson Huang                              <0x00010003 0x0000001f>,
96*f700bf65SAnson Huang                              <0x00010004 0x00000025>,
97*f700bf65SAnson Huang                              <0x00010005 0x0000002d>,
98*f700bf65SAnson Huang                              <0x00010006 0x00000033>,
99*f700bf65SAnson Huang                              <0x00010007 0x00000043>,
100*f700bf65SAnson Huang                              <0x00010008 0x0000004b>,
101*f700bf65SAnson Huang                              <0x00010009 0x00000053>,
102*f700bf65SAnson Huang                              <0x00020000 0x00000010>,
103*f700bf65SAnson Huang                              <0x00020001 0x00000017>,
104*f700bf65SAnson Huang                              <0x00020002 0x0000001f>,
105*f700bf65SAnson Huang                              <0x00020003 0x00000029>,
106*f700bf65SAnson Huang                              <0x00020004 0x00000031>,
107*f700bf65SAnson Huang                              <0x00020005 0x0000003c>,
108*f700bf65SAnson Huang                              <0x00020006 0x00000042>,
109*f700bf65SAnson Huang                              <0x00020007 0x0000004d>,
110*f700bf65SAnson Huang                              <0x00020008 0x00000056>,
111*f700bf65SAnson Huang                              <0x00030000 0x00000012>,
112*f700bf65SAnson Huang                              <0x00030001 0x0000001d>;
113*f700bf65SAnson Huang        #thermal-sensor-cells = <1>;
114*f700bf65SAnson Huang    };
115