xref: /linux/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml (revision bdd1a21b52557ea8f61d0a5dc2f77151b576eb70) 
1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm9860 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26
27      - description: v0.1 of TSENS
28        items:
29          - enum:
30              - qcom,mdm9607-tsens
31              - qcom,msm8916-tsens
32              - qcom,msm8939-tsens
33              - qcom,msm8974-tsens
34          - const: qcom,tsens-v0_1
35
36      - description: v1 of TSENS
37        items:
38          - enum:
39              - qcom,msm8976-tsens
40              - qcom,qcs404-tsens
41          - const: qcom,tsens-v1
42
43      - description: v2 of TSENS
44        items:
45          - enum:
46              - qcom,msm8996-tsens
47              - qcom,msm8998-tsens
48              - qcom,sc7180-tsens
49              - qcom,sc7280-tsens
50              - qcom,sc8180x-tsens
51              - qcom,sdm845-tsens
52              - qcom,sm8150-tsens
53              - qcom,sm8250-tsens
54              - qcom,sm8350-tsens
55          - const: qcom,tsens-v2
56
57  reg:
58    items:
59      - description: TM registers
60      - description: SROT registers
61
62  interrupts:
63    minItems: 1
64    items:
65      - description: Combined interrupt if upper or lower threshold crossed
66      - description: Interrupt if critical threshold crossed
67
68  interrupt-names:
69    minItems: 1
70    items:
71      - const: uplow
72      - const: critical
73
74  nvmem-cells:
75    minItems: 1
76    maxItems: 2
77    description:
78      Reference to an nvmem node for the calibration data
79
80  nvmem-cell-names:
81    minItems: 1
82    items:
83      - const: calib
84      - enum:
85          - calib_backup
86          - calib_sel
87
88  "#qcom,sensors":
89    description:
90      Number of sensors enabled on this platform
91    $ref: /schemas/types.yaml#/definitions/uint32
92    minimum: 1
93    maximum: 16
94
95  "#thermal-sensor-cells":
96    const: 1
97    description:
98      Number of cells required to uniquely identify the thermal sensors. Since
99      we have multiple sensors this is set to 1
100
101required:
102  - compatible
103  - interrupts
104  - interrupt-names
105  - "#thermal-sensor-cells"
106  - "#qcom,sensors"
107
108allOf:
109  - if:
110      properties:
111        compatible:
112          contains:
113            enum:
114              - qcom,ipq8064-tsens
115              - qcom,mdm9607-tsens
116              - qcom,msm8916-tsens
117              - qcom,msm8974-tsens
118              - qcom,msm8976-tsens
119              - qcom,qcs404-tsens
120              - qcom,tsens-v0_1
121              - qcom,tsens-v1
122    then:
123      properties:
124        interrupts:
125          maxItems: 1
126        interrupt-names:
127          maxItems: 1
128
129    else:
130      properties:
131        interrupts:
132          minItems: 2
133        interrupt-names:
134          minItems: 2
135
136  - if:
137      properties:
138        compatible:
139          contains:
140            enum:
141              - qcom,tsens-v0_1
142              - qcom,tsens-v1
143              - qcom,tsens-v2
144
145    then:
146      required:
147        - reg
148
149additionalProperties: false
150
151examples:
152  - |
153    #include <dt-bindings/interrupt-controller/arm-gic.h>
154    // Example msm9860 based SoC (ipq8064):
155    gcc: clock-controller {
156
157           /* ... */
158
159           tsens: thermal-sensor {
160                compatible = "qcom,ipq8064-tsens";
161
162                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
163                 nvmem-cell-names = "calib", "calib_backup";
164                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
165                 interrupt-names = "uplow";
166
167                 #qcom,sensors = <11>;
168                 #thermal-sensor-cells = <1>;
169          };
170    };
171
172  - |
173    #include <dt-bindings/interrupt-controller/arm-gic.h>
174    // Example 1 (legacy: for pre v1 IP):
175    tsens1: thermal-sensor@900000 {
176           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
177           reg = <0x4a9000 0x1000>, /* TM */
178                 <0x4a8000 0x1000>; /* SROT */
179
180           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
181           nvmem-cell-names = "calib", "calib_sel";
182
183           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
184           interrupt-names = "uplow";
185
186           #qcom,sensors = <5>;
187           #thermal-sensor-cells = <1>;
188    };
189
190  - |
191    #include <dt-bindings/interrupt-controller/arm-gic.h>
192    // Example 2 (for any platform containing v1 of the TSENS IP):
193    tsens2: thermal-sensor@4a9000 {
194          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
195          reg = <0x004a9000 0x1000>, /* TM */
196                <0x004a8000 0x1000>; /* SROT */
197
198          nvmem-cells = <&tsens_caldata>;
199          nvmem-cell-names = "calib";
200
201          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
202          interrupt-names = "uplow";
203
204          #qcom,sensors = <10>;
205          #thermal-sensor-cells = <1>;
206    };
207
208  - |
209    #include <dt-bindings/interrupt-controller/arm-gic.h>
210    // Example 3 (for any platform containing v2 of the TSENS IP):
211    tsens3: thermal-sensor@c263000 {
212           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
213           reg = <0xc263000 0x1ff>,
214                 <0xc222000 0x1ff>;
215
216           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
217                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
218           interrupt-names = "uplow", "critical";
219
220           #qcom,sensors = <13>;
221           #thermal-sensor-cells = <1>;
222    };
223...
224