1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8226-tsens 33 - qcom,msm8909-tsens 34 - qcom,msm8916-tsens 35 - qcom,msm8939-tsens 36 - qcom,msm8974-tsens 37 - const: qcom,tsens-v0_1 38 39 - description: 40 v1 of TSENS without RPM which requires to be explicitly reset 41 and enabled in the driver. 42 enum: 43 - qcom,ipq5018-tsens 44 45 - description: v1 of TSENS 46 items: 47 - enum: 48 - qcom,msm8937-tsens 49 - qcom,msm8956-tsens 50 - qcom,msm8976-tsens 51 - qcom,qcs404-tsens 52 - const: qcom,tsens-v1 53 54 - description: v2 of TSENS 55 items: 56 - enum: 57 - qcom,eliza-tsens 58 - qcom,glymur-tsens 59 - qcom,hawi-tsens 60 - qcom,kaanapali-tsens 61 - qcom,milos-tsens 62 - qcom,nord-tsens 63 - qcom,msm8953-tsens 64 - qcom,msm8996-tsens 65 - qcom,msm8998-tsens 66 - qcom,qcm2290-tsens 67 - qcom,qcs8300-tsens 68 - qcom,qcs615-tsens 69 - qcom,sa8255p-tsens 70 - qcom,sa8775p-tsens 71 - qcom,sar2130p-tsens 72 - qcom,sc7180-tsens 73 - qcom,sc7280-tsens 74 - qcom,sc8180x-tsens 75 - qcom,sc8280xp-tsens 76 - qcom,sdm630-tsens 77 - qcom,sdm670-tsens 78 - qcom,sdm845-tsens 79 - qcom,shikra-tsens 80 - qcom,sm6115-tsens 81 - qcom,sm6350-tsens 82 - qcom,sm6375-tsens 83 - qcom,sm8150-tsens 84 - qcom,sm8250-tsens 85 - qcom,sm8350-tsens 86 - qcom,sm8450-tsens 87 - qcom,sm8550-tsens 88 - qcom,sm8650-tsens 89 - qcom,sm8750-tsens 90 - qcom,x1e80100-tsens 91 - const: qcom,tsens-v2 92 93 - description: v2 of TSENS with combined interrupt 94 enum: 95 - qcom,ipq5332-tsens 96 - qcom,ipq5424-tsens 97 - qcom,ipq8074-tsens 98 99 - description: v2 of TSENS with combined interrupt 100 items: 101 - enum: 102 - qcom,ipq6018-tsens 103 - qcom,ipq9574-tsens 104 - const: qcom,ipq8074-tsens 105 106 reg: 107 items: 108 - description: TM registers 109 - description: SROT registers 110 111 interrupts: 112 minItems: 1 113 maxItems: 2 114 115 interrupt-names: 116 minItems: 1 117 maxItems: 2 118 119 nvmem-cells: 120 oneOf: 121 - minItems: 1 122 maxItems: 2 123 description: 124 Reference to an nvmem node for the calibration data 125 - minItems: 5 126 maxItems: 35 127 description: | 128 Reference to nvmem cells for the calibration mode, two calibration 129 bases and two cells per each sensor 130 # special case for msm8974 / apq8084 131 - maxItems: 51 132 description: | 133 Reference to nvmem cells for the calibration mode, two calibration 134 bases and two cells per each sensor, main and backup copies, plus use_backup cell 135 136 nvmem-cell-names: 137 oneOf: 138 - minItems: 1 139 items: 140 - const: calib 141 - enum: 142 - calib_backup 143 - calib_sel 144 - minItems: 5 145 items: 146 - const: mode 147 - const: base1 148 - const: base2 149 - pattern: '^s[0-9]+_p1$' 150 - pattern: '^s[0-9]+_p2$' 151 - pattern: '^s[0-9]+_p1$' 152 - pattern: '^s[0-9]+_p2$' 153 - pattern: '^s[0-9]+_p1$' 154 - pattern: '^s[0-9]+_p2$' 155 - pattern: '^s[0-9]+_p1$' 156 - pattern: '^s[0-9]+_p2$' 157 - pattern: '^s[0-9]+_p1$' 158 - pattern: '^s[0-9]+_p2$' 159 - pattern: '^s[0-9]+_p1$' 160 - pattern: '^s[0-9]+_p2$' 161 - pattern: '^s[0-9]+_p1$' 162 - pattern: '^s[0-9]+_p2$' 163 - pattern: '^s[0-9]+_p1$' 164 - pattern: '^s[0-9]+_p2$' 165 - pattern: '^s[0-9]+_p1$' 166 - pattern: '^s[0-9]+_p2$' 167 - pattern: '^s[0-9]+_p1$' 168 - pattern: '^s[0-9]+_p2$' 169 - pattern: '^s[0-9]+_p1$' 170 - pattern: '^s[0-9]+_p2$' 171 - pattern: '^s[0-9]+_p1$' 172 - pattern: '^s[0-9]+_p2$' 173 - pattern: '^s[0-9]+_p1$' 174 - pattern: '^s[0-9]+_p2$' 175 - pattern: '^s[0-9]+_p1$' 176 - pattern: '^s[0-9]+_p2$' 177 - pattern: '^s[0-9]+_p1$' 178 - pattern: '^s[0-9]+_p2$' 179 - pattern: '^s[0-9]+_p1$' 180 - pattern: '^s[0-9]+_p2$' 181 # special case for msm8974 / apq8084 182 - items: 183 - const: mode 184 - const: base1 185 - const: base2 186 - const: use_backup 187 - const: mode_backup 188 - const: base1_backup 189 - const: base2_backup 190 - const: s0_p1 191 - const: s0_p2 192 - const: s1_p1 193 - const: s1_p2 194 - const: s2_p1 195 - const: s2_p2 196 - const: s3_p1 197 - const: s3_p2 198 - const: s4_p1 199 - const: s4_p2 200 - const: s5_p1 201 - const: s5_p2 202 - const: s6_p1 203 - const: s6_p2 204 - const: s7_p1 205 - const: s7_p2 206 - const: s8_p1 207 - const: s8_p2 208 - const: s9_p1 209 - const: s9_p2 210 - const: s10_p1 211 - const: s10_p2 212 - const: s0_p1_backup 213 - const: s0_p2_backup 214 - const: s1_p1_backup 215 - const: s1_p2_backup 216 - const: s2_p1_backup 217 - const: s2_p2_backup 218 - const: s3_p1_backup 219 - const: s3_p2_backup 220 - const: s4_p1_backup 221 - const: s4_p2_backup 222 - const: s5_p1_backup 223 - const: s5_p2_backup 224 - const: s6_p1_backup 225 - const: s6_p2_backup 226 - const: s7_p1_backup 227 - const: s7_p2_backup 228 - const: s8_p1_backup 229 - const: s8_p2_backup 230 - const: s9_p1_backup 231 - const: s9_p2_backup 232 - const: s10_p1_backup 233 - const: s10_p2_backup 234 - minItems: 8 235 items: 236 - const: mode 237 - const: base0 238 - const: base1 239 - pattern: '^tsens_sens[0-9]+_off$' 240 - pattern: '^tsens_sens[0-9]+_off$' 241 - pattern: '^tsens_sens[0-9]+_off$' 242 - pattern: '^tsens_sens[0-9]+_off$' 243 - pattern: '^tsens_sens[0-9]+_off$' 244 - pattern: '^tsens_sens[0-9]+_off$' 245 - pattern: '^tsens_sens[0-9]+_off$' 246 247 "#qcom,sensors": 248 description: 249 Number of sensors enabled on this platform 250 $ref: /schemas/types.yaml#/definitions/uint32 251 minimum: 1 252 maximum: 16 253 254 "#thermal-sensor-cells": 255 const: 1 256 257required: 258 - compatible 259 - interrupts 260 - interrupt-names 261 - "#qcom,sensors" 262 263allOf: 264 - $ref: thermal-sensor.yaml# 265 266 - if: 267 properties: 268 compatible: 269 contains: 270 enum: 271 - qcom,ipq5018-tsens 272 - qcom,ipq8064-tsens 273 - qcom,msm8960-tsens 274 - qcom,tsens-v0_1 275 - qcom,tsens-v1 276 then: 277 properties: 278 interrupts: 279 items: 280 - description: Combined interrupt if upper or lower threshold crossed 281 interrupt-names: 282 items: 283 - const: uplow 284 285 - if: 286 properties: 287 compatible: 288 contains: 289 const: qcom,tsens-v2 290 then: 291 properties: 292 interrupts: 293 items: 294 - description: Combined interrupt if upper or lower threshold crossed 295 - description: Interrupt if critical threshold crossed 296 interrupt-names: 297 items: 298 - const: uplow 299 - const: critical 300 301 - if: 302 properties: 303 compatible: 304 contains: 305 enum: 306 - qcom,ipq5332-tsens 307 - qcom,ipq5424-tsens 308 - qcom,ipq8074-tsens 309 then: 310 properties: 311 interrupts: 312 items: 313 - description: Combined interrupt if upper, lower or critical thresholds crossed 314 interrupt-names: 315 items: 316 - const: combined 317 318 - if: 319 properties: 320 compatible: 321 contains: 322 enum: 323 - qcom,ipq5332-tsens 324 - qcom,ipq5424-tsens 325 - qcom,ipq8074-tsens 326 - qcom,tsens-v0_1 327 - qcom,tsens-v1 328 - qcom,tsens-v2 329 330 then: 331 required: 332 - reg 333 334unevaluatedProperties: false 335 336examples: 337 - | 338 #include <dt-bindings/interrupt-controller/arm-gic.h> 339 thermal-sensor { 340 compatible = "qcom,ipq8064-tsens"; 341 342 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 343 nvmem-cell-names = "calib", "calib_backup"; 344 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 345 interrupt-names = "uplow"; 346 347 #qcom,sensors = <11>; 348 #thermal-sensor-cells = <1>; 349 }; 350 351 - | 352 #include <dt-bindings/interrupt-controller/arm-gic.h> 353 // Example 1 (new calibration data: for pre v1 IP): 354 thermal-sensor@4a9000 { 355 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 356 reg = <0x4a9000 0x1000>, /* TM */ 357 <0x4a8000 0x1000>; /* SROT */ 358 359 nvmem-cells = <&tsens_mode>, 360 <&tsens_base1>, <&tsens_base2>, 361 <&tsens_s0_p1>, <&tsens_s0_p2>, 362 <&tsens_s1_p1>, <&tsens_s1_p2>, 363 <&tsens_s2_p1>, <&tsens_s2_p2>, 364 <&tsens_s4_p1>, <&tsens_s4_p2>, 365 <&tsens_s5_p1>, <&tsens_s5_p2>; 366 nvmem-cell-names = "mode", 367 "base1", "base2", 368 "s0_p1", "s0_p2", 369 "s1_p1", "s1_p2", 370 "s2_p1", "s2_p2", 371 "s4_p1", "s4_p2", 372 "s5_p1", "s5_p2"; 373 374 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 375 interrupt-names = "uplow"; 376 377 #qcom,sensors = <5>; 378 #thermal-sensor-cells = <1>; 379 }; 380 381 - | 382 #include <dt-bindings/interrupt-controller/arm-gic.h> 383 // Example 1 (legacy: for pre v1 IP): 384 tsens1: thermal-sensor@4a9000 { 385 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 386 reg = <0x4a9000 0x1000>, /* TM */ 387 <0x4a8000 0x1000>; /* SROT */ 388 389 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 390 nvmem-cell-names = "calib", "calib_sel"; 391 392 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 393 interrupt-names = "uplow"; 394 395 #qcom,sensors = <5>; 396 #thermal-sensor-cells = <1>; 397 }; 398 399 - | 400 #include <dt-bindings/interrupt-controller/arm-gic.h> 401 // Example 2 (for any platform containing v1 of the TSENS IP): 402 tsens2: thermal-sensor@4a9000 { 403 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 404 reg = <0x004a9000 0x1000>, /* TM */ 405 <0x004a8000 0x1000>; /* SROT */ 406 407 nvmem-cells = <&tsens_caldata>; 408 nvmem-cell-names = "calib"; 409 410 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 411 interrupt-names = "uplow"; 412 413 #qcom,sensors = <10>; 414 #thermal-sensor-cells = <1>; 415 }; 416 417 - | 418 #include <dt-bindings/interrupt-controller/arm-gic.h> 419 // Example 3 (for any platform containing v2 of the TSENS IP): 420 tsens3: thermal-sensor@c263000 { 421 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 422 reg = <0xc263000 0x1ff>, 423 <0xc222000 0x1ff>; 424 425 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 426 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 427 interrupt-names = "uplow", "critical"; 428 429 #qcom,sensors = <13>; 430 #thermal-sensor-cells = <1>; 431 }; 432 433 - | 434 #include <dt-bindings/interrupt-controller/arm-gic.h> 435 // Example 4 (for any IPQ8074 based SoC-s): 436 tsens4: thermal-sensor@4a9000 { 437 compatible = "qcom,ipq8074-tsens"; 438 reg = <0x4a9000 0x1000>, 439 <0x4a8000 0x1000>; 440 441 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 442 interrupt-names = "combined"; 443 444 #qcom,sensors = <16>; 445 #thermal-sensor-cells = <1>; 446 }; 447... 448