1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8226-tsens 33 - qcom,msm8909-tsens 34 - qcom,msm8916-tsens 35 - qcom,msm8939-tsens 36 - qcom,msm8974-tsens 37 - const: qcom,tsens-v0_1 38 39 - description: 40 v1 of TSENS without RPM which requires to be explicitly reset 41 and enabled in the driver. 42 enum: 43 - qcom,ipq5018-tsens 44 45 - description: v1 of TSENS 46 items: 47 - enum: 48 - qcom,msm8937-tsens 49 - qcom,msm8956-tsens 50 - qcom,msm8976-tsens 51 - qcom,qcs404-tsens 52 - const: qcom,tsens-v1 53 54 - description: v2 of TSENS 55 items: 56 - enum: 57 - qcom,glymur-tsens 58 - qcom,kaanapali-tsens 59 - qcom,milos-tsens 60 - qcom,msm8953-tsens 61 - qcom,msm8996-tsens 62 - qcom,msm8998-tsens 63 - qcom,qcm2290-tsens 64 - qcom,qcs8300-tsens 65 - qcom,qcs615-tsens 66 - qcom,sa8255p-tsens 67 - qcom,sa8775p-tsens 68 - qcom,sar2130p-tsens 69 - qcom,sc7180-tsens 70 - qcom,sc7280-tsens 71 - qcom,sc8180x-tsens 72 - qcom,sc8280xp-tsens 73 - qcom,sdm630-tsens 74 - qcom,sdm845-tsens 75 - qcom,sm6115-tsens 76 - qcom,sm6350-tsens 77 - qcom,sm6375-tsens 78 - qcom,sm8150-tsens 79 - qcom,sm8250-tsens 80 - qcom,sm8350-tsens 81 - qcom,sm8450-tsens 82 - qcom,sm8550-tsens 83 - qcom,sm8650-tsens 84 - qcom,x1e80100-tsens 85 - const: qcom,tsens-v2 86 87 - description: v2 of TSENS with combined interrupt 88 enum: 89 - qcom,ipq5332-tsens 90 - qcom,ipq5424-tsens 91 - qcom,ipq8074-tsens 92 93 - description: v2 of TSENS with combined interrupt 94 items: 95 - enum: 96 - qcom,ipq6018-tsens 97 - qcom,ipq9574-tsens 98 - const: qcom,ipq8074-tsens 99 100 reg: 101 items: 102 - description: TM registers 103 - description: SROT registers 104 105 interrupts: 106 minItems: 1 107 maxItems: 2 108 109 interrupt-names: 110 minItems: 1 111 maxItems: 2 112 113 nvmem-cells: 114 oneOf: 115 - minItems: 1 116 maxItems: 2 117 description: 118 Reference to an nvmem node for the calibration data 119 - minItems: 5 120 maxItems: 35 121 description: | 122 Reference to nvmem cells for the calibration mode, two calibration 123 bases and two cells per each sensor 124 # special case for msm8974 / apq8084 125 - maxItems: 51 126 description: | 127 Reference to nvmem cells for the calibration mode, two calibration 128 bases and two cells per each sensor, main and backup copies, plus use_backup cell 129 130 nvmem-cell-names: 131 oneOf: 132 - minItems: 1 133 items: 134 - const: calib 135 - enum: 136 - calib_backup 137 - calib_sel 138 - minItems: 5 139 items: 140 - const: mode 141 - const: base1 142 - const: base2 143 - pattern: '^s[0-9]+_p1$' 144 - pattern: '^s[0-9]+_p2$' 145 - pattern: '^s[0-9]+_p1$' 146 - pattern: '^s[0-9]+_p2$' 147 - pattern: '^s[0-9]+_p1$' 148 - pattern: '^s[0-9]+_p2$' 149 - pattern: '^s[0-9]+_p1$' 150 - pattern: '^s[0-9]+_p2$' 151 - pattern: '^s[0-9]+_p1$' 152 - pattern: '^s[0-9]+_p2$' 153 - pattern: '^s[0-9]+_p1$' 154 - pattern: '^s[0-9]+_p2$' 155 - pattern: '^s[0-9]+_p1$' 156 - pattern: '^s[0-9]+_p2$' 157 - pattern: '^s[0-9]+_p1$' 158 - pattern: '^s[0-9]+_p2$' 159 - pattern: '^s[0-9]+_p1$' 160 - pattern: '^s[0-9]+_p2$' 161 - pattern: '^s[0-9]+_p1$' 162 - pattern: '^s[0-9]+_p2$' 163 - pattern: '^s[0-9]+_p1$' 164 - pattern: '^s[0-9]+_p2$' 165 - pattern: '^s[0-9]+_p1$' 166 - pattern: '^s[0-9]+_p2$' 167 - pattern: '^s[0-9]+_p1$' 168 - pattern: '^s[0-9]+_p2$' 169 - pattern: '^s[0-9]+_p1$' 170 - pattern: '^s[0-9]+_p2$' 171 - pattern: '^s[0-9]+_p1$' 172 - pattern: '^s[0-9]+_p2$' 173 - pattern: '^s[0-9]+_p1$' 174 - pattern: '^s[0-9]+_p2$' 175 # special case for msm8974 / apq8084 176 - items: 177 - const: mode 178 - const: base1 179 - const: base2 180 - const: use_backup 181 - const: mode_backup 182 - const: base1_backup 183 - const: base2_backup 184 - const: s0_p1 185 - const: s0_p2 186 - const: s1_p1 187 - const: s1_p2 188 - const: s2_p1 189 - const: s2_p2 190 - const: s3_p1 191 - const: s3_p2 192 - const: s4_p1 193 - const: s4_p2 194 - const: s5_p1 195 - const: s5_p2 196 - const: s6_p1 197 - const: s6_p2 198 - const: s7_p1 199 - const: s7_p2 200 - const: s8_p1 201 - const: s8_p2 202 - const: s9_p1 203 - const: s9_p2 204 - const: s10_p1 205 - const: s10_p2 206 - const: s0_p1_backup 207 - const: s0_p2_backup 208 - const: s1_p1_backup 209 - const: s1_p2_backup 210 - const: s2_p1_backup 211 - const: s2_p2_backup 212 - const: s3_p1_backup 213 - const: s3_p2_backup 214 - const: s4_p1_backup 215 - const: s4_p2_backup 216 - const: s5_p1_backup 217 - const: s5_p2_backup 218 - const: s6_p1_backup 219 - const: s6_p2_backup 220 - const: s7_p1_backup 221 - const: s7_p2_backup 222 - const: s8_p1_backup 223 - const: s8_p2_backup 224 - const: s9_p1_backup 225 - const: s9_p2_backup 226 - const: s10_p1_backup 227 - const: s10_p2_backup 228 - minItems: 8 229 items: 230 - const: mode 231 - const: base0 232 - const: base1 233 - pattern: '^tsens_sens[0-9]+_off$' 234 - pattern: '^tsens_sens[0-9]+_off$' 235 - pattern: '^tsens_sens[0-9]+_off$' 236 - pattern: '^tsens_sens[0-9]+_off$' 237 - pattern: '^tsens_sens[0-9]+_off$' 238 - pattern: '^tsens_sens[0-9]+_off$' 239 - pattern: '^tsens_sens[0-9]+_off$' 240 241 "#qcom,sensors": 242 description: 243 Number of sensors enabled on this platform 244 $ref: /schemas/types.yaml#/definitions/uint32 245 minimum: 1 246 maximum: 16 247 248 "#thermal-sensor-cells": 249 const: 1 250 251required: 252 - compatible 253 - interrupts 254 - interrupt-names 255 - "#qcom,sensors" 256 257allOf: 258 - $ref: thermal-sensor.yaml# 259 260 - if: 261 properties: 262 compatible: 263 contains: 264 enum: 265 - qcom,ipq5018-tsens 266 - qcom,ipq8064-tsens 267 - qcom,msm8960-tsens 268 - qcom,tsens-v0_1 269 - qcom,tsens-v1 270 then: 271 properties: 272 interrupts: 273 items: 274 - description: Combined interrupt if upper or lower threshold crossed 275 interrupt-names: 276 items: 277 - const: uplow 278 279 - if: 280 properties: 281 compatible: 282 contains: 283 const: qcom,tsens-v2 284 then: 285 properties: 286 interrupts: 287 items: 288 - description: Combined interrupt if upper or lower threshold crossed 289 - description: Interrupt if critical threshold crossed 290 interrupt-names: 291 items: 292 - const: uplow 293 - const: critical 294 295 - if: 296 properties: 297 compatible: 298 contains: 299 enum: 300 - qcom,ipq5332-tsens 301 - qcom,ipq5424-tsens 302 - qcom,ipq8074-tsens 303 then: 304 properties: 305 interrupts: 306 items: 307 - description: Combined interrupt if upper, lower or critical thresholds crossed 308 interrupt-names: 309 items: 310 - const: combined 311 312 - if: 313 properties: 314 compatible: 315 contains: 316 enum: 317 - qcom,ipq5332-tsens 318 - qcom,ipq5424-tsens 319 - qcom,ipq8074-tsens 320 - qcom,tsens-v0_1 321 - qcom,tsens-v1 322 - qcom,tsens-v2 323 324 then: 325 required: 326 - reg 327 328unevaluatedProperties: false 329 330examples: 331 - | 332 #include <dt-bindings/interrupt-controller/arm-gic.h> 333 thermal-sensor { 334 compatible = "qcom,ipq8064-tsens"; 335 336 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 337 nvmem-cell-names = "calib", "calib_backup"; 338 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 339 interrupt-names = "uplow"; 340 341 #qcom,sensors = <11>; 342 #thermal-sensor-cells = <1>; 343 }; 344 345 - | 346 #include <dt-bindings/interrupt-controller/arm-gic.h> 347 // Example 1 (new calibration data: for pre v1 IP): 348 thermal-sensor@4a9000 { 349 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 350 reg = <0x4a9000 0x1000>, /* TM */ 351 <0x4a8000 0x1000>; /* SROT */ 352 353 nvmem-cells = <&tsens_mode>, 354 <&tsens_base1>, <&tsens_base2>, 355 <&tsens_s0_p1>, <&tsens_s0_p2>, 356 <&tsens_s1_p1>, <&tsens_s1_p2>, 357 <&tsens_s2_p1>, <&tsens_s2_p2>, 358 <&tsens_s4_p1>, <&tsens_s4_p2>, 359 <&tsens_s5_p1>, <&tsens_s5_p2>; 360 nvmem-cell-names = "mode", 361 "base1", "base2", 362 "s0_p1", "s0_p2", 363 "s1_p1", "s1_p2", 364 "s2_p1", "s2_p2", 365 "s4_p1", "s4_p2", 366 "s5_p1", "s5_p2"; 367 368 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 369 interrupt-names = "uplow"; 370 371 #qcom,sensors = <5>; 372 #thermal-sensor-cells = <1>; 373 }; 374 375 - | 376 #include <dt-bindings/interrupt-controller/arm-gic.h> 377 // Example 1 (legacy: for pre v1 IP): 378 tsens1: thermal-sensor@4a9000 { 379 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 380 reg = <0x4a9000 0x1000>, /* TM */ 381 <0x4a8000 0x1000>; /* SROT */ 382 383 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 384 nvmem-cell-names = "calib", "calib_sel"; 385 386 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 387 interrupt-names = "uplow"; 388 389 #qcom,sensors = <5>; 390 #thermal-sensor-cells = <1>; 391 }; 392 393 - | 394 #include <dt-bindings/interrupt-controller/arm-gic.h> 395 // Example 2 (for any platform containing v1 of the TSENS IP): 396 tsens2: thermal-sensor@4a9000 { 397 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 398 reg = <0x004a9000 0x1000>, /* TM */ 399 <0x004a8000 0x1000>; /* SROT */ 400 401 nvmem-cells = <&tsens_caldata>; 402 nvmem-cell-names = "calib"; 403 404 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 405 interrupt-names = "uplow"; 406 407 #qcom,sensors = <10>; 408 #thermal-sensor-cells = <1>; 409 }; 410 411 - | 412 #include <dt-bindings/interrupt-controller/arm-gic.h> 413 // Example 3 (for any platform containing v2 of the TSENS IP): 414 tsens3: thermal-sensor@c263000 { 415 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 416 reg = <0xc263000 0x1ff>, 417 <0xc222000 0x1ff>; 418 419 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 421 interrupt-names = "uplow", "critical"; 422 423 #qcom,sensors = <13>; 424 #thermal-sensor-cells = <1>; 425 }; 426 427 - | 428 #include <dt-bindings/interrupt-controller/arm-gic.h> 429 // Example 4 (for any IPQ8074 based SoC-s): 430 tsens4: thermal-sensor@4a9000 { 431 compatible = "qcom,ipq8074-tsens"; 432 reg = <0x4a9000 0x1000>, 433 <0x4a8000 0x1000>; 434 435 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 436 interrupt-names = "combined"; 437 438 #qcom,sensors = <16>; 439 #thermal-sensor-cells = <1>; 440 }; 441... 442