xref: /linux/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml (revision 7a309195d11cde854eb75559fbd6b48f9e518f25) 
1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: v0.1 of TSENS
23        items:
24          - enum:
25              - qcom,msm8916-tsens
26              - qcom,msm8974-tsens
27          - const: qcom,tsens-v0_1
28
29      - description: v1 of TSENS
30        items:
31          - enum:
32              - qcom,msm8976-tsens
33              - qcom,qcs404-tsens
34          - const: qcom,tsens-v1
35
36      - description: v2 of TSENS
37        items:
38          - enum:
39              - qcom,msm8996-tsens
40              - qcom,msm8998-tsens
41              - qcom,sc7180-tsens
42              - qcom,sdm845-tsens
43              - qcom,sm8150-tsens
44              - qcom,sm8250-tsens
45          - const: qcom,tsens-v2
46
47  reg:
48    items:
49      - description: TM registers
50      - description: SROT registers
51
52  interrupts:
53    minItems: 1
54    items:
55      - description: Combined interrupt if upper or lower threshold crossed
56      - description: Interrupt if critical threshold crossed
57
58  interrupt-names:
59    minItems: 1
60    items:
61      - const: uplow
62      - const: critical
63
64  nvmem-cells:
65    minItems: 1
66    maxItems: 2
67    description:
68      Reference to an nvmem node for the calibration data
69
70  nvmem-cell-names:
71    minItems: 1
72    maxItems: 2
73    items:
74      - const: calib
75      - const: calib_sel
76
77  "#qcom,sensors":
78    description:
79      Number of sensors enabled on this platform
80    $ref: /schemas/types.yaml#/definitions/uint32
81    minimum: 1
82    maximum: 16
83
84  "#thermal-sensor-cells":
85    const: 1
86    description:
87      Number of cells required to uniquely identify the thermal sensors. Since
88      we have multiple sensors this is set to 1
89
90allOf:
91  - if:
92      properties:
93        compatible:
94          contains:
95            enum:
96              - qcom,msm8916-tsens
97              - qcom,msm8974-tsens
98              - qcom,msm8976-tsens
99              - qcom,qcs404-tsens
100              - qcom,tsens-v0_1
101              - qcom,tsens-v1
102    then:
103      properties:
104        interrupts:
105          maxItems: 1
106        interrupt-names:
107          maxItems: 1
108
109    else:
110      properties:
111        interrupts:
112          minItems: 2
113        interrupt-names:
114          minItems: 2
115
116required:
117  - compatible
118  - reg
119  - "#qcom,sensors"
120  - interrupts
121  - interrupt-names
122  - "#thermal-sensor-cells"
123
124additionalProperties: false
125
126examples:
127  - |
128    #include <dt-bindings/interrupt-controller/arm-gic.h>
129    // Example 1 (legacy: for pre v1 IP):
130    tsens1: thermal-sensor@900000 {
131           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
132           reg = <0x4a9000 0x1000>, /* TM */
133                 <0x4a8000 0x1000>; /* SROT */
134
135           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
136           nvmem-cell-names = "calib", "calib_sel";
137
138           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
139           interrupt-names = "uplow";
140
141           #qcom,sensors = <5>;
142           #thermal-sensor-cells = <1>;
143    };
144
145  - |
146    #include <dt-bindings/interrupt-controller/arm-gic.h>
147    // Example 2 (for any platform containing v1 of the TSENS IP):
148    tsens2: thermal-sensor@4a9000 {
149          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
150          reg = <0x004a9000 0x1000>, /* TM */
151                <0x004a8000 0x1000>; /* SROT */
152
153          nvmem-cells = <&tsens_caldata>;
154          nvmem-cell-names = "calib";
155
156          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
157          interrupt-names = "uplow";
158
159          #qcom,sensors = <10>;
160          #thermal-sensor-cells = <1>;
161    };
162
163  - |
164    #include <dt-bindings/interrupt-controller/arm-gic.h>
165    // Example 3 (for any platform containing v2 of the TSENS IP):
166    tsens3: thermal-sensor@c263000 {
167           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
168           reg = <0xc263000 0x1ff>,
169                 <0xc222000 0x1ff>;
170
171           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
172                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
173           interrupt-names = "uplow", "critical";
174
175           #qcom,sensors = <13>;
176           #thermal-sensor-cells = <1>;
177    };
178...
179