1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8226-tsens 33 - qcom,msm8909-tsens 34 - qcom,msm8916-tsens 35 - qcom,msm8939-tsens 36 - qcom,msm8974-tsens 37 - const: qcom,tsens-v0_1 38 39 - description: 40 v1 of TSENS without RPM which requires to be explicitly reset 41 and enabled in the driver. 42 enum: 43 - qcom,ipq5018-tsens 44 45 - description: v1 of TSENS 46 items: 47 - enum: 48 - qcom,msm8937-tsens 49 - qcom,msm8956-tsens 50 - qcom,msm8976-tsens 51 - qcom,qcs404-tsens 52 - const: qcom,tsens-v1 53 54 - description: v2 of TSENS 55 items: 56 - enum: 57 - qcom,eliza-tsens 58 - qcom,glymur-tsens 59 - qcom,kaanapali-tsens 60 - qcom,milos-tsens 61 - qcom,msm8953-tsens 62 - qcom,msm8996-tsens 63 - qcom,msm8998-tsens 64 - qcom,qcm2290-tsens 65 - qcom,qcs8300-tsens 66 - qcom,qcs615-tsens 67 - qcom,sa8255p-tsens 68 - qcom,sa8775p-tsens 69 - qcom,sar2130p-tsens 70 - qcom,sc7180-tsens 71 - qcom,sc7280-tsens 72 - qcom,sc8180x-tsens 73 - qcom,sc8280xp-tsens 74 - qcom,sdm630-tsens 75 - qcom,sdm670-tsens 76 - qcom,sdm845-tsens 77 - qcom,sm6115-tsens 78 - qcom,sm6350-tsens 79 - qcom,sm6375-tsens 80 - qcom,sm8150-tsens 81 - qcom,sm8250-tsens 82 - qcom,sm8350-tsens 83 - qcom,sm8450-tsens 84 - qcom,sm8550-tsens 85 - qcom,sm8650-tsens 86 - qcom,sm8750-tsens 87 - qcom,x1e80100-tsens 88 - const: qcom,tsens-v2 89 90 - description: v2 of TSENS with combined interrupt 91 enum: 92 - qcom,ipq5332-tsens 93 - qcom,ipq5424-tsens 94 - qcom,ipq8074-tsens 95 96 - description: v2 of TSENS with combined interrupt 97 items: 98 - enum: 99 - qcom,ipq6018-tsens 100 - qcom,ipq9574-tsens 101 - const: qcom,ipq8074-tsens 102 103 reg: 104 items: 105 - description: TM registers 106 - description: SROT registers 107 108 interrupts: 109 minItems: 1 110 maxItems: 2 111 112 interrupt-names: 113 minItems: 1 114 maxItems: 2 115 116 nvmem-cells: 117 oneOf: 118 - minItems: 1 119 maxItems: 2 120 description: 121 Reference to an nvmem node for the calibration data 122 - minItems: 5 123 maxItems: 35 124 description: | 125 Reference to nvmem cells for the calibration mode, two calibration 126 bases and two cells per each sensor 127 # special case for msm8974 / apq8084 128 - maxItems: 51 129 description: | 130 Reference to nvmem cells for the calibration mode, two calibration 131 bases and two cells per each sensor, main and backup copies, plus use_backup cell 132 133 nvmem-cell-names: 134 oneOf: 135 - minItems: 1 136 items: 137 - const: calib 138 - enum: 139 - calib_backup 140 - calib_sel 141 - minItems: 5 142 items: 143 - const: mode 144 - const: base1 145 - const: base2 146 - pattern: '^s[0-9]+_p1$' 147 - pattern: '^s[0-9]+_p2$' 148 - pattern: '^s[0-9]+_p1$' 149 - pattern: '^s[0-9]+_p2$' 150 - pattern: '^s[0-9]+_p1$' 151 - pattern: '^s[0-9]+_p2$' 152 - pattern: '^s[0-9]+_p1$' 153 - pattern: '^s[0-9]+_p2$' 154 - pattern: '^s[0-9]+_p1$' 155 - pattern: '^s[0-9]+_p2$' 156 - pattern: '^s[0-9]+_p1$' 157 - pattern: '^s[0-9]+_p2$' 158 - pattern: '^s[0-9]+_p1$' 159 - pattern: '^s[0-9]+_p2$' 160 - pattern: '^s[0-9]+_p1$' 161 - pattern: '^s[0-9]+_p2$' 162 - pattern: '^s[0-9]+_p1$' 163 - pattern: '^s[0-9]+_p2$' 164 - pattern: '^s[0-9]+_p1$' 165 - pattern: '^s[0-9]+_p2$' 166 - pattern: '^s[0-9]+_p1$' 167 - pattern: '^s[0-9]+_p2$' 168 - pattern: '^s[0-9]+_p1$' 169 - pattern: '^s[0-9]+_p2$' 170 - pattern: '^s[0-9]+_p1$' 171 - pattern: '^s[0-9]+_p2$' 172 - pattern: '^s[0-9]+_p1$' 173 - pattern: '^s[0-9]+_p2$' 174 - pattern: '^s[0-9]+_p1$' 175 - pattern: '^s[0-9]+_p2$' 176 - pattern: '^s[0-9]+_p1$' 177 - pattern: '^s[0-9]+_p2$' 178 # special case for msm8974 / apq8084 179 - items: 180 - const: mode 181 - const: base1 182 - const: base2 183 - const: use_backup 184 - const: mode_backup 185 - const: base1_backup 186 - const: base2_backup 187 - const: s0_p1 188 - const: s0_p2 189 - const: s1_p1 190 - const: s1_p2 191 - const: s2_p1 192 - const: s2_p2 193 - const: s3_p1 194 - const: s3_p2 195 - const: s4_p1 196 - const: s4_p2 197 - const: s5_p1 198 - const: s5_p2 199 - const: s6_p1 200 - const: s6_p2 201 - const: s7_p1 202 - const: s7_p2 203 - const: s8_p1 204 - const: s8_p2 205 - const: s9_p1 206 - const: s9_p2 207 - const: s10_p1 208 - const: s10_p2 209 - const: s0_p1_backup 210 - const: s0_p2_backup 211 - const: s1_p1_backup 212 - const: s1_p2_backup 213 - const: s2_p1_backup 214 - const: s2_p2_backup 215 - const: s3_p1_backup 216 - const: s3_p2_backup 217 - const: s4_p1_backup 218 - const: s4_p2_backup 219 - const: s5_p1_backup 220 - const: s5_p2_backup 221 - const: s6_p1_backup 222 - const: s6_p2_backup 223 - const: s7_p1_backup 224 - const: s7_p2_backup 225 - const: s8_p1_backup 226 - const: s8_p2_backup 227 - const: s9_p1_backup 228 - const: s9_p2_backup 229 - const: s10_p1_backup 230 - const: s10_p2_backup 231 - minItems: 8 232 items: 233 - const: mode 234 - const: base0 235 - const: base1 236 - pattern: '^tsens_sens[0-9]+_off$' 237 - pattern: '^tsens_sens[0-9]+_off$' 238 - pattern: '^tsens_sens[0-9]+_off$' 239 - pattern: '^tsens_sens[0-9]+_off$' 240 - pattern: '^tsens_sens[0-9]+_off$' 241 - pattern: '^tsens_sens[0-9]+_off$' 242 - pattern: '^tsens_sens[0-9]+_off$' 243 244 "#qcom,sensors": 245 description: 246 Number of sensors enabled on this platform 247 $ref: /schemas/types.yaml#/definitions/uint32 248 minimum: 1 249 maximum: 16 250 251 "#thermal-sensor-cells": 252 const: 1 253 254required: 255 - compatible 256 - interrupts 257 - interrupt-names 258 - "#qcom,sensors" 259 260allOf: 261 - $ref: thermal-sensor.yaml# 262 263 - if: 264 properties: 265 compatible: 266 contains: 267 enum: 268 - qcom,ipq5018-tsens 269 - qcom,ipq8064-tsens 270 - qcom,msm8960-tsens 271 - qcom,tsens-v0_1 272 - qcom,tsens-v1 273 then: 274 properties: 275 interrupts: 276 items: 277 - description: Combined interrupt if upper or lower threshold crossed 278 interrupt-names: 279 items: 280 - const: uplow 281 282 - if: 283 properties: 284 compatible: 285 contains: 286 const: qcom,tsens-v2 287 then: 288 properties: 289 interrupts: 290 items: 291 - description: Combined interrupt if upper or lower threshold crossed 292 - description: Interrupt if critical threshold crossed 293 interrupt-names: 294 items: 295 - const: uplow 296 - const: critical 297 298 - if: 299 properties: 300 compatible: 301 contains: 302 enum: 303 - qcom,ipq5332-tsens 304 - qcom,ipq5424-tsens 305 - qcom,ipq8074-tsens 306 then: 307 properties: 308 interrupts: 309 items: 310 - description: Combined interrupt if upper, lower or critical thresholds crossed 311 interrupt-names: 312 items: 313 - const: combined 314 315 - if: 316 properties: 317 compatible: 318 contains: 319 enum: 320 - qcom,ipq5332-tsens 321 - qcom,ipq5424-tsens 322 - qcom,ipq8074-tsens 323 - qcom,tsens-v0_1 324 - qcom,tsens-v1 325 - qcom,tsens-v2 326 327 then: 328 required: 329 - reg 330 331unevaluatedProperties: false 332 333examples: 334 - | 335 #include <dt-bindings/interrupt-controller/arm-gic.h> 336 thermal-sensor { 337 compatible = "qcom,ipq8064-tsens"; 338 339 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 340 nvmem-cell-names = "calib", "calib_backup"; 341 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 342 interrupt-names = "uplow"; 343 344 #qcom,sensors = <11>; 345 #thermal-sensor-cells = <1>; 346 }; 347 348 - | 349 #include <dt-bindings/interrupt-controller/arm-gic.h> 350 // Example 1 (new calibration data: for pre v1 IP): 351 thermal-sensor@4a9000 { 352 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 353 reg = <0x4a9000 0x1000>, /* TM */ 354 <0x4a8000 0x1000>; /* SROT */ 355 356 nvmem-cells = <&tsens_mode>, 357 <&tsens_base1>, <&tsens_base2>, 358 <&tsens_s0_p1>, <&tsens_s0_p2>, 359 <&tsens_s1_p1>, <&tsens_s1_p2>, 360 <&tsens_s2_p1>, <&tsens_s2_p2>, 361 <&tsens_s4_p1>, <&tsens_s4_p2>, 362 <&tsens_s5_p1>, <&tsens_s5_p2>; 363 nvmem-cell-names = "mode", 364 "base1", "base2", 365 "s0_p1", "s0_p2", 366 "s1_p1", "s1_p2", 367 "s2_p1", "s2_p2", 368 "s4_p1", "s4_p2", 369 "s5_p1", "s5_p2"; 370 371 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 372 interrupt-names = "uplow"; 373 374 #qcom,sensors = <5>; 375 #thermal-sensor-cells = <1>; 376 }; 377 378 - | 379 #include <dt-bindings/interrupt-controller/arm-gic.h> 380 // Example 1 (legacy: for pre v1 IP): 381 tsens1: thermal-sensor@4a9000 { 382 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 383 reg = <0x4a9000 0x1000>, /* TM */ 384 <0x4a8000 0x1000>; /* SROT */ 385 386 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 387 nvmem-cell-names = "calib", "calib_sel"; 388 389 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 390 interrupt-names = "uplow"; 391 392 #qcom,sensors = <5>; 393 #thermal-sensor-cells = <1>; 394 }; 395 396 - | 397 #include <dt-bindings/interrupt-controller/arm-gic.h> 398 // Example 2 (for any platform containing v1 of the TSENS IP): 399 tsens2: thermal-sensor@4a9000 { 400 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 401 reg = <0x004a9000 0x1000>, /* TM */ 402 <0x004a8000 0x1000>; /* SROT */ 403 404 nvmem-cells = <&tsens_caldata>; 405 nvmem-cell-names = "calib"; 406 407 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 408 interrupt-names = "uplow"; 409 410 #qcom,sensors = <10>; 411 #thermal-sensor-cells = <1>; 412 }; 413 414 - | 415 #include <dt-bindings/interrupt-controller/arm-gic.h> 416 // Example 3 (for any platform containing v2 of the TSENS IP): 417 tsens3: thermal-sensor@c263000 { 418 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 419 reg = <0xc263000 0x1ff>, 420 <0xc222000 0x1ff>; 421 422 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 423 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 424 interrupt-names = "uplow", "critical"; 425 426 #qcom,sensors = <13>; 427 #thermal-sensor-cells = <1>; 428 }; 429 430 - | 431 #include <dt-bindings/interrupt-controller/arm-gic.h> 432 // Example 4 (for any IPQ8074 based SoC-s): 433 tsens4: thermal-sensor@4a9000 { 434 compatible = "qcom,ipq8074-tsens"; 435 reg = <0x4a9000 0x1000>, 436 <0x4a8000 0x1000>; 437 438 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 439 interrupt-names = "combined"; 440 441 #qcom,sensors = <16>; 442 #thermal-sensor-cells = <1>; 443 }; 444... 445