xref: /linux/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml (revision 02680c23d7b3febe45ea3d4f9818c2b2dc89020a) 
1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm9860 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26
27      - description: v0.1 of TSENS
28        items:
29          - enum:
30              - qcom,mdm9607-tsens
31              - qcom,msm8916-tsens
32              - qcom,msm8939-tsens
33              - qcom,msm8974-tsens
34          - const: qcom,tsens-v0_1
35
36      - description: v1 of TSENS
37        items:
38          - enum:
39              - qcom,msm8976-tsens
40              - qcom,qcs404-tsens
41          - const: qcom,tsens-v1
42
43      - description: v2 of TSENS
44        items:
45          - enum:
46              - qcom,msm8996-tsens
47              - qcom,msm8998-tsens
48              - qcom,sc7180-tsens
49              - qcom,sdm845-tsens
50              - qcom,sm8150-tsens
51              - qcom,sm8250-tsens
52              - qcom,sm8350-tsens
53          - const: qcom,tsens-v2
54
55  reg:
56    items:
57      - description: TM registers
58      - description: SROT registers
59
60  interrupts:
61    minItems: 1
62    items:
63      - description: Combined interrupt if upper or lower threshold crossed
64      - description: Interrupt if critical threshold crossed
65
66  interrupt-names:
67    minItems: 1
68    items:
69      - const: uplow
70      - const: critical
71
72  nvmem-cells:
73    minItems: 1
74    maxItems: 2
75    description:
76      Reference to an nvmem node for the calibration data
77
78  nvmem-cell-names:
79    minItems: 1
80    maxItems: 2
81    items:
82      - const: calib
83      - enum:
84          - calib_backup
85          - calib_sel
86
87  "#qcom,sensors":
88    description:
89      Number of sensors enabled on this platform
90    $ref: /schemas/types.yaml#/definitions/uint32
91    minimum: 1
92    maximum: 16
93
94  "#thermal-sensor-cells":
95    const: 1
96    description:
97      Number of cells required to uniquely identify the thermal sensors. Since
98      we have multiple sensors this is set to 1
99
100required:
101  - compatible
102  - interrupts
103  - interrupt-names
104  - "#thermal-sensor-cells"
105  - "#qcom,sensors"
106
107allOf:
108  - if:
109      properties:
110        compatible:
111          contains:
112            enum:
113              - qcom,ipq8064-tsens
114              - qcom,mdm9607-tsens
115              - qcom,msm8916-tsens
116              - qcom,msm8974-tsens
117              - qcom,msm8976-tsens
118              - qcom,qcs404-tsens
119              - qcom,tsens-v0_1
120              - qcom,tsens-v1
121    then:
122      properties:
123        interrupts:
124          maxItems: 1
125        interrupt-names:
126          maxItems: 1
127
128    else:
129      properties:
130        interrupts:
131          minItems: 2
132        interrupt-names:
133          minItems: 2
134
135  - if:
136      properties:
137        compatible:
138          contains:
139            enum:
140              - qcom,tsens-v0_1
141              - qcom,tsens-v1
142              - qcom,tsens-v2
143
144    then:
145      required:
146        - reg
147
148additionalProperties: false
149
150examples:
151  - |
152    #include <dt-bindings/interrupt-controller/arm-gic.h>
153    // Example msm9860 based SoC (ipq8064):
154    gcc: clock-controller {
155
156           /* ... */
157
158           tsens: thermal-sensor {
159                compatible = "qcom,ipq8064-tsens";
160
161                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
162                 nvmem-cell-names = "calib", "calib_backup";
163                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
164                 interrupt-names = "uplow";
165
166                 #qcom,sensors = <11>;
167                 #thermal-sensor-cells = <1>;
168          };
169    };
170
171  - |
172    #include <dt-bindings/interrupt-controller/arm-gic.h>
173    // Example 1 (legacy: for pre v1 IP):
174    tsens1: thermal-sensor@900000 {
175           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
176           reg = <0x4a9000 0x1000>, /* TM */
177                 <0x4a8000 0x1000>; /* SROT */
178
179           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
180           nvmem-cell-names = "calib", "calib_sel";
181
182           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
183           interrupt-names = "uplow";
184
185           #qcom,sensors = <5>;
186           #thermal-sensor-cells = <1>;
187    };
188
189  - |
190    #include <dt-bindings/interrupt-controller/arm-gic.h>
191    // Example 2 (for any platform containing v1 of the TSENS IP):
192    tsens2: thermal-sensor@4a9000 {
193          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
194          reg = <0x004a9000 0x1000>, /* TM */
195                <0x004a8000 0x1000>; /* SROT */
196
197          nvmem-cells = <&tsens_caldata>;
198          nvmem-cell-names = "calib";
199
200          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
201          interrupt-names = "uplow";
202
203          #qcom,sensors = <10>;
204          #thermal-sensor-cells = <1>;
205    };
206
207  - |
208    #include <dt-bindings/interrupt-controller/arm-gic.h>
209    // Example 3 (for any platform containing v2 of the TSENS IP):
210    tsens3: thermal-sensor@c263000 {
211           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
212           reg = <0xc263000 0x1ff>,
213                 <0xc222000 0x1ff>;
214
215           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
216                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
217           interrupt-names = "uplow", "critical";
218
219           #qcom,sensors = <13>;
220           #thermal-sensor-cells = <1>;
221    };
222...
223