xref: /linux/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml (revision 53597deca0e38c30e6cd4ba2114fa42d2bcd85bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2021 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Qualcomm Limits Management Hardware(LMh)
9
10maintainers:
11  - Thara Gopinath <thara.gopinath@gmail.com>
12
13description:
14  Limits Management Hardware(LMh) is a hardware infrastructure on some
15  Qualcomm SoCs that can enforce temperature and current limits as
16  programmed by software for certain IPs like CPU.
17
18properties:
19  compatible:
20    oneOf:
21      - enum:
22          - qcom,sc8180x-lmh
23          - qcom,sdm845-lmh
24          - qcom,sm8150-lmh
25      - items:
26          - const: qcom,sdm670-lmh
27          - const: qcom,sdm845-lmh
28      - items:
29          - const: qcom,qcm2290-lmh
30          - const: qcom,sm8150-lmh
31
32  reg:
33    items:
34      - description: core registers
35
36  interrupts:
37    maxItems: 1
38
39  '#interrupt-cells':
40    const: 1
41
42  interrupt-controller: true
43
44  cpus:
45    description:
46      phandle of the first cpu in the LMh cluster
47    maxItems: 1
48
49  qcom,lmh-temp-arm-millicelsius:
50    description:
51      An integer expressing temperature threshold at which the LMh thermal
52      FSM is engaged.
53
54  qcom,lmh-temp-low-millicelsius:
55    description:
56      An integer expressing temperature threshold at which the state machine
57      will attempt to remove frequency throttling.
58
59  qcom,lmh-temp-high-millicelsius:
60    description:
61      An integer expressing temperature threshold at which the state machine
62      will attempt to throttle the frequency.
63
64required:
65  - compatible
66  - reg
67  - interrupts
68  - '#interrupt-cells'
69  - interrupt-controller
70  - cpus
71  - qcom,lmh-temp-arm-millicelsius
72  - qcom,lmh-temp-low-millicelsius
73  - qcom,lmh-temp-high-millicelsius
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/interrupt-controller/arm-gic.h>
80
81    lmh@17d70800 {
82      compatible = "qcom,sdm845-lmh";
83      reg = <0x17d70800 0x400>;
84      interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
85      cpus = <&CPU4>;
86      qcom,lmh-temp-arm-millicelsius = <65000>;
87      qcom,lmh-temp-low-millicelsius = <94500>;
88      qcom,lmh-temp-high-millicelsius = <95000>;
89      interrupt-controller;
90      #interrupt-cells = <1>;
91    };
92