xref: /linux/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml (revision 2ed2e359dea752e7758d29a423033031a0b96584)
109144981SJishnu Prakash# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
209144981SJishnu Prakash%YAML 1.2
309144981SJishnu Prakash---
409144981SJishnu Prakash$id: http://devicetree.org/schemas/spmi/qcom,glymur-spmi-pmic-arb.yaml#
509144981SJishnu Prakash$schema: http://devicetree.org/meta-schemas/core.yaml#
609144981SJishnu Prakash
709144981SJishnu Prakashtitle: Qualcomm Technologies, Inc. Glymur SPMI Controller (PMIC Arbiter v8)
809144981SJishnu Prakash
909144981SJishnu Prakashmaintainers:
1009144981SJishnu Prakash  - David Collins <david.collins@oss.qualcomm.com>
1109144981SJishnu Prakash
1209144981SJishnu Prakashdescription: |
1309144981SJishnu Prakash  The Glymur SPMI PMIC Arbiter implements HW version 8 and it's an SPMI
1409144981SJishnu Prakash  controller with wrapping arbitration logic to allow for multiple on-chip
1509144981SJishnu Prakash  devices to control up to 4 SPMI separate buses.
1609144981SJishnu Prakash
1709144981SJishnu Prakash  The PMIC Arbiter can also act as an interrupt controller, providing interrupts
1809144981SJishnu Prakash  to slave devices.
1909144981SJishnu Prakash
2009144981SJishnu PrakashallOf:
2109144981SJishnu Prakash  - $ref: /schemas/spmi/qcom,spmi-pmic-arb-common.yaml
2209144981SJishnu Prakash
2309144981SJishnu Prakashproperties:
2409144981SJishnu Prakash  compatible:
2509144981SJishnu Prakash    oneOf:
2609144981SJishnu Prakash      - items:
2709144981SJishnu Prakash          - enum:
28*9ac747ebSFenglin Wu              - qcom,hawi-spmi-pmic-arb
2909144981SJishnu Prakash              - qcom,kaanapali-spmi-pmic-arb
3009144981SJishnu Prakash          - const: qcom,glymur-spmi-pmic-arb
3109144981SJishnu Prakash      - enum:
3209144981SJishnu Prakash          - qcom,glymur-spmi-pmic-arb
3309144981SJishnu Prakash
3409144981SJishnu Prakash  reg:
3509144981SJishnu Prakash    items:
3609144981SJishnu Prakash      - description: core registers
3709144981SJishnu Prakash      - description: tx-channel per virtual slave registers
3809144981SJishnu Prakash      - description: rx-channel (called observer) per virtual slave registers
3909144981SJishnu Prakash      - description: channel to PMIC peripheral mapping registers
4009144981SJishnu Prakash
4109144981SJishnu Prakash  reg-names:
4209144981SJishnu Prakash    items:
4309144981SJishnu Prakash      - const: core
4409144981SJishnu Prakash      - const: chnls
4509144981SJishnu Prakash      - const: obsrvr
4609144981SJishnu Prakash      - const: chnl_map
4709144981SJishnu Prakash
4809144981SJishnu Prakash  ranges: true
4909144981SJishnu Prakash
5009144981SJishnu Prakash  '#address-cells':
5109144981SJishnu Prakash    const: 2
5209144981SJishnu Prakash
5309144981SJishnu Prakash  '#size-cells':
5409144981SJishnu Prakash    const: 2
5509144981SJishnu Prakash
5609144981SJishnu PrakashpatternProperties:
5709144981SJishnu Prakash  "^spmi@[a-f0-9]+$":
5809144981SJishnu Prakash    type: object
5909144981SJishnu Prakash    $ref: /schemas/spmi/spmi.yaml
6009144981SJishnu Prakash    unevaluatedProperties: false
6109144981SJishnu Prakash
6209144981SJishnu Prakash    properties:
6309144981SJishnu Prakash      reg:
6409144981SJishnu Prakash        items:
6509144981SJishnu Prakash          - description: configuration registers
6609144981SJishnu Prakash          - description: interrupt controller registers
6709144981SJishnu Prakash          - description: channel owner EE mapping registers
6809144981SJishnu Prakash
6909144981SJishnu Prakash      reg-names:
7009144981SJishnu Prakash        items:
7109144981SJishnu Prakash          - const: cnfg
7209144981SJishnu Prakash          - const: intr
7309144981SJishnu Prakash          - const: chnl_owner
7409144981SJishnu Prakash
7509144981SJishnu Prakash      interrupts:
7609144981SJishnu Prakash        maxItems: 1
7709144981SJishnu Prakash
7809144981SJishnu Prakash      interrupt-names:
7909144981SJishnu Prakash        const: periph_irq
8009144981SJishnu Prakash
8109144981SJishnu Prakash      interrupt-controller: true
8209144981SJishnu Prakash
8309144981SJishnu Prakash      '#interrupt-cells':
8409144981SJishnu Prakash        const: 4
8509144981SJishnu Prakash        description: |
8609144981SJishnu Prakash          cell 1: slave ID for the requested interrupt (0-15)
8709144981SJishnu Prakash          cell 2: peripheral ID for requested interrupt (0-255)
8809144981SJishnu Prakash          cell 3: the requested peripheral interrupt (0-7)
8909144981SJishnu Prakash          cell 4: interrupt flags indicating level-sense information,
9009144981SJishnu Prakash                  as defined in dt-bindings/interrupt-controller/irq.h
9109144981SJishnu Prakash
9209144981SJishnu Prakashrequired:
9309144981SJishnu Prakash  - compatible
9409144981SJishnu Prakash  - reg-names
9509144981SJishnu Prakash
9609144981SJishnu PrakashunevaluatedProperties: false
9709144981SJishnu Prakash
9809144981SJishnu Prakashexamples:
9909144981SJishnu Prakash  - |
10009144981SJishnu Prakash    #include <dt-bindings/interrupt-controller/arm-gic.h>
10109144981SJishnu Prakash
10209144981SJishnu Prakash    soc {
10309144981SJishnu Prakash        #address-cells = <2>;
10409144981SJishnu Prakash        #size-cells = <2>;
10509144981SJishnu Prakash
10609144981SJishnu Prakash        arbiter@c400000 {
10709144981SJishnu Prakash            compatible = "qcom,glymur-spmi-pmic-arb";
10809144981SJishnu Prakash            reg = <0x0 0xc400000 0x0 0x3000>,
10909144981SJishnu Prakash                  <0x0 0xc900000 0x0 0x400000>,
11009144981SJishnu Prakash                  <0x0 0xc4c0000 0x0 0x400000>,
11109144981SJishnu Prakash                  <0x0 0xc403000 0x0 0x8000>;
11209144981SJishnu Prakash            reg-names = "core", "chnls", "obsrvr", "chnl_map";
11309144981SJishnu Prakash
11409144981SJishnu Prakash            qcom,ee = <0>;
11509144981SJishnu Prakash            qcom,channel = <0>;
11609144981SJishnu Prakash
11709144981SJishnu Prakash            #address-cells = <2>;
11809144981SJishnu Prakash            #size-cells = <2>;
11909144981SJishnu Prakash            ranges;
12009144981SJishnu Prakash
12109144981SJishnu Prakash            spmi@c426000 {
12209144981SJishnu Prakash                reg = <0x0 0xc426000 0x0 0x4000>,
12309144981SJishnu Prakash                      <0x0 0xc8c0000 0x0 0x10000>,
12409144981SJishnu Prakash                      <0x0 0xc42a000 0x0 0x8000>;
12509144981SJishnu Prakash                reg-names = "cnfg", "intr", "chnl_owner";
12609144981SJishnu Prakash
12709144981SJishnu Prakash                interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
12809144981SJishnu Prakash                interrupt-names = "periph_irq";
12909144981SJishnu Prakash                interrupt-controller;
13009144981SJishnu Prakash                #interrupt-cells = <4>;
13109144981SJishnu Prakash
13209144981SJishnu Prakash                #address-cells = <2>;
13309144981SJishnu Prakash                #size-cells = <0>;
13409144981SJishnu Prakash            };
13509144981SJishnu Prakash
13609144981SJishnu Prakash            spmi@c437000 {
13709144981SJishnu Prakash                reg = <0x0 0xc437000 0x0 0x4000>,
13809144981SJishnu Prakash                      <0x0 0xc8d0000 0x0 0x10000>,
13909144981SJishnu Prakash                      <0x0 0xc43b000 0x0 0x8000>;
14009144981SJishnu Prakash                reg-names = "cnfg", "intr", "chnl_owner";
14109144981SJishnu Prakash
14209144981SJishnu Prakash                interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>;
14309144981SJishnu Prakash                interrupt-names = "periph_irq";
14409144981SJishnu Prakash                interrupt-controller;
14509144981SJishnu Prakash                #interrupt-cells = <4>;
14609144981SJishnu Prakash
14709144981SJishnu Prakash                #address-cells = <2>;
14809144981SJishnu Prakash                #size-cells = <0>;
14909144981SJishnu Prakash            };
15009144981SJishnu Prakash        };
15109144981SJishnu Prakash    };
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