xref: /linux/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml (revision c7546e2c3cb739a3c1a2f5acaf9bb629d401afe5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Flex Serial Peripheral Interface (FSPI)
8
9maintainers:
10  - Han Xu <han.xu@nxp.com>
11  - Kuldeep Singh <singh.kuldeep87k@gmail.com>
12
13allOf:
14  - $ref: spi-controller.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - nxp,imx8dxl-fspi
21          - nxp,imx8mm-fspi
22          - nxp,imx8mp-fspi
23          - nxp,imx8qxp-fspi
24          - nxp,imx8ulp-fspi
25          - nxp,lx2160a-fspi
26      - items:
27          - enum:
28              - nxp,imx93-fspi
29              - nxp,imx95-fspi
30          - const: nxp,imx8mm-fspi
31
32  reg:
33    items:
34      - description: registers address space
35      - description: memory mapped address space
36
37  reg-names:
38    items:
39      - const: fspi_base
40      - const: fspi_mmap
41
42  interrupts:
43    maxItems: 1
44
45  clocks:
46    items:
47      - description: SPI bus clock
48      - description: SPI serial clock
49
50  clock-names:
51    items:
52      - const: fspi_en
53      - const: fspi
54
55  power-domains:
56    maxItems: 1
57
58required:
59  - compatible
60  - reg
61  - reg-names
62  - interrupts
63  - clocks
64  - clock-names
65
66unevaluatedProperties: false
67
68examples:
69  - |
70    #include <dt-bindings/interrupt-controller/arm-gic.h>
71    #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
72
73    soc {
74        #address-cells = <2>;
75        #size-cells = <2>;
76
77        spi@20c0000 {
78            compatible = "nxp,lx2160a-fspi";
79            reg = <0x0 0x20c0000 0x0 0x100000>,
80                  <0x0 0x20000000 0x0 0x10000000>;
81            reg-names = "fspi_base", "fspi_mmap";
82            interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
83            clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>,
84                     <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>;
85            clock-names = "fspi_en", "fspi";
86            #address-cells = <1>;
87            #size-cells = <0>;
88
89            flash@0 {
90                compatible = "jedec,spi-nor";
91                spi-max-frequency = <50000000>;
92                reg = <0>;
93                spi-rx-bus-width = <8>;
94                spi-tx-bus-width = <8>;
95            };
96        };
97    };
98