xref: /linux/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml (revision d13ee586e026e8166231e03e5345718ebf625c02) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Low Power SPI (LPSPI) for i.MX
8
9maintainers:
10  - Anson Huang <Anson.Huang@nxp.com>
11
12allOf:
13  - $ref: "/schemas/spi/spi-controller.yaml#"
14
15properties:
16  compatible:
17    enum:
18      - fsl,imx7ulp-spi
19      - fsl,imx8qxp-spi
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    items:
29      - description: SoC SPI per clock
30      - description: SoC SPI ipg clock
31
32  clock-names:
33    items:
34      - const: per
35      - const: ipg
36
37  fsl,spi-only-use-cs1-sel:
38    description:
39      spi common code does not support use of CS signals discontinuously.
40      i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
41      this property to re-config the chipselect value in the LPSPI driver.
42    type: boolean
43
44required:
45  - compatible
46  - reg
47  - interrupts
48  - clocks
49  - clock-names
50
51unevaluatedProperties: false
52
53examples:
54  - |
55    #include <dt-bindings/clock/imx7ulp-clock.h>
56    #include <dt-bindings/interrupt-controller/arm-gic.h>
57
58    spi@40290000 {
59        compatible = "fsl,imx7ulp-spi";
60        reg = <0x40290000 0x10000>;
61        interrupt-parent = <&intc>;
62        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
63        clocks = <&clks IMX7ULP_CLK_LPSPI2>,
64                 <&clks IMX7ULP_CLK_DUMMY>;
65        clock-names = "per", "ipg";
66        spi-slave;
67        fsl,spi-only-use-cs1-sel;
68    };
69