1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale Low Power SPI (LPSPI) for i.MX 8 9maintainers: 10 - Anson Huang <Anson.Huang@nxp.com> 11 12allOf: 13 - $ref: /schemas/spi/spi-controller.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - enum: 19 - fsl,imx7ulp-spi 20 - fsl,imx8qxp-spi 21 - items: 22 - enum: 23 - fsl,imx8ulp-spi 24 - fsl,imx93-spi 25 - fsl,imx95-spi 26 - const: fsl,imx7ulp-spi 27 reg: 28 maxItems: 1 29 30 interrupts: 31 maxItems: 1 32 33 clocks: 34 items: 35 - description: SoC SPI per clock 36 - description: SoC SPI ipg clock 37 38 clock-names: 39 items: 40 - const: per 41 - const: ipg 42 43 dmas: 44 items: 45 - description: TX DMA Channel 46 - description: RX DMA Channel 47 48 dma-names: 49 items: 50 - const: tx 51 - const: rx 52 53 fsl,spi-only-use-cs1-sel: 54 description: 55 spi common code does not support use of CS signals discontinuously. 56 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add 57 this property to re-config the chipselect value in the LPSPI driver. 58 type: boolean 59 60 num-cs: 61 description: 62 number of chip selects. 63 minimum: 1 64 maximum: 2 65 default: 1 66 67 power-domains: 68 maxItems: 1 69 70required: 71 - compatible 72 - reg 73 - interrupts 74 - clocks 75 - clock-names 76 77unevaluatedProperties: false 78 79examples: 80 - | 81 #include <dt-bindings/clock/imx7ulp-clock.h> 82 #include <dt-bindings/interrupt-controller/arm-gic.h> 83 84 spi@40290000 { 85 compatible = "fsl,imx7ulp-spi"; 86 reg = <0x40290000 0x10000>; 87 interrupt-parent = <&intc>; 88 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 89 clocks = <&clks IMX7ULP_CLK_LPSPI2>, 90 <&clks IMX7ULP_CLK_DUMMY>; 91 clock-names = "per", "ipg"; 92 spi-slave; 93 fsl,spi-only-use-cs1-sel; 94 num-cs = <2>; 95 }; 96