xref: /linux/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml (revision 1136fa0c07de570dc17858745af8be169d1440ba) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Low Power SPI (LPSPI) for i.MX
8
9maintainers:
10  - Anson Huang <Anson.Huang@nxp.com>
11
12allOf:
13  - $ref: "/schemas/spi/spi-controller.yaml#"
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - fsl,imx7ulp-spi
20          - fsl,imx8qxp-spi
21      - items:
22          - const: fsl,imx8ulp-spi
23          - const: fsl,imx7ulp-spi
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    items:
32      - description: SoC SPI per clock
33      - description: SoC SPI ipg clock
34
35  clock-names:
36    items:
37      - const: per
38      - const: ipg
39
40  fsl,spi-only-use-cs1-sel:
41    description:
42      spi common code does not support use of CS signals discontinuously.
43      i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
44      this property to re-config the chipselect value in the LPSPI driver.
45    type: boolean
46
47required:
48  - compatible
49  - reg
50  - interrupts
51  - clocks
52  - clock-names
53
54unevaluatedProperties: false
55
56examples:
57  - |
58    #include <dt-bindings/clock/imx7ulp-clock.h>
59    #include <dt-bindings/interrupt-controller/arm-gic.h>
60
61    spi@40290000 {
62        compatible = "fsl,imx7ulp-spi";
63        reg = <0x40290000 0x10000>;
64        interrupt-parent = <&intc>;
65        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
66        clocks = <&clks IMX7ULP_CLK_LPSPI2>,
67                 <&clks IMX7ULP_CLK_DUMMY>;
68        clock-names = "per", "ipg";
69        spi-slave;
70        fsl,spi-only-use-cs1-sel;
71    };
72