1be8faebcSAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2be8faebcSAnson Huang%YAML 1.2 3be8faebcSAnson Huang--- 4be8faebcSAnson Huang$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml# 5be8faebcSAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 6be8faebcSAnson Huang 7be8faebcSAnson Huangtitle: Freescale Low Power SPI (LPSPI) for i.MX 8be8faebcSAnson Huang 9be8faebcSAnson Huangmaintainers: 10be8faebcSAnson Huang - Anson Huang <Anson.Huang@nxp.com> 11be8faebcSAnson Huang 12be8faebcSAnson HuangallOf: 13be8faebcSAnson Huang - $ref: "/schemas/spi/spi-controller.yaml#" 14be8faebcSAnson Huang 15be8faebcSAnson Huangproperties: 16be8faebcSAnson Huang compatible: 17*49cd1eb3SJacky Bai oneOf: 18*49cd1eb3SJacky Bai - enum: 19be8faebcSAnson Huang - fsl,imx7ulp-spi 20be8faebcSAnson Huang - fsl,imx8qxp-spi 21*49cd1eb3SJacky Bai - items: 22*49cd1eb3SJacky Bai - const: fsl,imx8ulp-spi 23*49cd1eb3SJacky Bai - const: fsl,imx7ulp-spi 24be8faebcSAnson Huang reg: 25be8faebcSAnson Huang maxItems: 1 26be8faebcSAnson Huang 27be8faebcSAnson Huang interrupts: 28be8faebcSAnson Huang maxItems: 1 29be8faebcSAnson Huang 30be8faebcSAnson Huang clocks: 31be8faebcSAnson Huang items: 32be8faebcSAnson Huang - description: SoC SPI per clock 33be8faebcSAnson Huang - description: SoC SPI ipg clock 34be8faebcSAnson Huang 35be8faebcSAnson Huang clock-names: 36be8faebcSAnson Huang items: 37be8faebcSAnson Huang - const: per 38be8faebcSAnson Huang - const: ipg 39be8faebcSAnson Huang 407ac9bbf6SClark Wang fsl,spi-only-use-cs1-sel: 417ac9bbf6SClark Wang description: 427ac9bbf6SClark Wang spi common code does not support use of CS signals discontinuously. 437ac9bbf6SClark Wang i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add 447ac9bbf6SClark Wang this property to re-config the chipselect value in the LPSPI driver. 450454357fSGeert Uytterhoeven type: boolean 467ac9bbf6SClark Wang 47be8faebcSAnson Huangrequired: 48be8faebcSAnson Huang - compatible 49be8faebcSAnson Huang - reg 50be8faebcSAnson Huang - interrupts 51be8faebcSAnson Huang - clocks 52be8faebcSAnson Huang - clock-names 53be8faebcSAnson Huang 54be8faebcSAnson HuangunevaluatedProperties: false 55be8faebcSAnson Huang 56be8faebcSAnson Huangexamples: 57be8faebcSAnson Huang - | 58be8faebcSAnson Huang #include <dt-bindings/clock/imx7ulp-clock.h> 59be8faebcSAnson Huang #include <dt-bindings/interrupt-controller/arm-gic.h> 60be8faebcSAnson Huang 61be8faebcSAnson Huang spi@40290000 { 62be8faebcSAnson Huang compatible = "fsl,imx7ulp-spi"; 63be8faebcSAnson Huang reg = <0x40290000 0x10000>; 64be8faebcSAnson Huang interrupt-parent = <&intc>; 65be8faebcSAnson Huang interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 66be8faebcSAnson Huang clocks = <&clks IMX7ULP_CLK_LPSPI2>, 67be8faebcSAnson Huang <&clks IMX7ULP_CLK_DUMMY>; 68be8faebcSAnson Huang clock-names = "per", "ipg"; 69be8faebcSAnson Huang spi-slave; 707ac9bbf6SClark Wang fsl,spi-only-use-cs1-sel; 71be8faebcSAnson Huang }; 72