1be8faebcSAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2be8faebcSAnson Huang%YAML 1.2 3be8faebcSAnson Huang--- 4be8faebcSAnson Huang$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml# 5be8faebcSAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 6be8faebcSAnson Huang 7be8faebcSAnson Huangtitle: Freescale Low Power SPI (LPSPI) for i.MX 8be8faebcSAnson Huang 9be8faebcSAnson Huangmaintainers: 10be8faebcSAnson Huang - Anson Huang <Anson.Huang@nxp.com> 11be8faebcSAnson Huang 12be8faebcSAnson HuangallOf: 13be8faebcSAnson Huang - $ref: "/schemas/spi/spi-controller.yaml#" 14be8faebcSAnson Huang 15be8faebcSAnson Huangproperties: 16be8faebcSAnson Huang compatible: 17be8faebcSAnson Huang enum: 18be8faebcSAnson Huang - fsl,imx7ulp-spi 19be8faebcSAnson Huang - fsl,imx8qxp-spi 20be8faebcSAnson Huang 21be8faebcSAnson Huang reg: 22be8faebcSAnson Huang maxItems: 1 23be8faebcSAnson Huang 24be8faebcSAnson Huang interrupts: 25be8faebcSAnson Huang maxItems: 1 26be8faebcSAnson Huang 27be8faebcSAnson Huang clocks: 28be8faebcSAnson Huang items: 29be8faebcSAnson Huang - description: SoC SPI per clock 30be8faebcSAnson Huang - description: SoC SPI ipg clock 31be8faebcSAnson Huang 32be8faebcSAnson Huang clock-names: 33be8faebcSAnson Huang items: 34be8faebcSAnson Huang - const: per 35be8faebcSAnson Huang - const: ipg 36be8faebcSAnson Huang 377ac9bbf6SClark Wang fsl,spi-only-use-cs1-sel: 387ac9bbf6SClark Wang description: 397ac9bbf6SClark Wang spi common code does not support use of CS signals discontinuously. 407ac9bbf6SClark Wang i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add 417ac9bbf6SClark Wang this property to re-config the chipselect value in the LPSPI driver. 42*0454357fSGeert Uytterhoeven type: boolean 437ac9bbf6SClark Wang 44be8faebcSAnson Huangrequired: 45be8faebcSAnson Huang - compatible 46be8faebcSAnson Huang - reg 47be8faebcSAnson Huang - interrupts 48be8faebcSAnson Huang - clocks 49be8faebcSAnson Huang - clock-names 50be8faebcSAnson Huang 51be8faebcSAnson HuangunevaluatedProperties: false 52be8faebcSAnson Huang 53be8faebcSAnson Huangexamples: 54be8faebcSAnson Huang - | 55be8faebcSAnson Huang #include <dt-bindings/clock/imx7ulp-clock.h> 56be8faebcSAnson Huang #include <dt-bindings/interrupt-controller/arm-gic.h> 57be8faebcSAnson Huang 58be8faebcSAnson Huang spi@40290000 { 59be8faebcSAnson Huang compatible = "fsl,imx7ulp-spi"; 60be8faebcSAnson Huang reg = <0x40290000 0x10000>; 61be8faebcSAnson Huang interrupt-parent = <&intc>; 62be8faebcSAnson Huang interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 63be8faebcSAnson Huang clocks = <&clks IMX7ULP_CLK_LPSPI2>, 64be8faebcSAnson Huang <&clks IMX7ULP_CLK_DUMMY>; 65be8faebcSAnson Huang clock-names = "per", "ipg"; 66be8faebcSAnson Huang spi-slave; 677ac9bbf6SClark Wang fsl,spi-only-use-cs1-sel; 68be8faebcSAnson Huang }; 69