1*ea2ff61bSArnd BergmannSerial Peripheral Interface on Cirrus Logic CL-PS71xx, EP72xx, EP73xx 2*ea2ff61bSArnd Bergmann 3*ea2ff61bSArnd BergmannRequired properties 4*ea2ff61bSArnd Bergmann- #address-cells: must be <1> 5*ea2ff61bSArnd Bergmann- #size-cells: must be <0> 6*ea2ff61bSArnd Bergmann- compatible: should include "cirrus,ep7209-spi" 7*ea2ff61bSArnd Bergmann- reg: Address and length of one register range 8*ea2ff61bSArnd Bergmann- interrupts: one interrupt line 9*ea2ff61bSArnd Bergmann- clocks: One entry, refers to the SPI bus clock 10*ea2ff61bSArnd Bergmann- cs-gpios: Specifies the gpio pins to be used for chipselects. 11*ea2ff61bSArnd Bergmann See: Documentation/devicetree/bindings/spi/spi-bus.txt 12*ea2ff61bSArnd Bergmann 13*ea2ff61bSArnd BergmannAn additional register is present in the system controller, 14*ea2ff61bSArnd Bergmannwhich is assumed to be in the same device tree, with and marked 15*ea2ff61bSArnd Bergmannas compatible with "cirrus,ep7209-syscon3". 16*ea2ff61bSArnd Bergmann 17*ea2ff61bSArnd BergmannExample: 18*ea2ff61bSArnd Bergmann 19*ea2ff61bSArnd Bergmannspi@80000500 { 20*ea2ff61bSArnd Bergmann #address-cells = <1>; 21*ea2ff61bSArnd Bergmann #size-cells = <0>; 22*ea2ff61bSArnd Bergmann compatible = "cirrus,ep7209-spi"; 23*ea2ff61bSArnd Bergmann reg = <0x80000500 0x4>; 24*ea2ff61bSArnd Bergmann interrupts = <15>; 25*ea2ff61bSArnd Bergmann clocks = <&clks CLPS711X_CLK_SPI>; 26*ea2ff61bSArnd Bergmann}; 27*ea2ff61bSArnd Bergmann 28*ea2ff61bSArnd Bergmannsyscon3: syscon@80002200 { 29*ea2ff61bSArnd Bergmann compatible = "cirrus,ep7209-syscon3", "syscon"; 30*ea2ff61bSArnd Bergmann reg = <0x80002200 0x40>; 31*ea2ff61bSArnd Bergmann}; 32*ea2ff61bSArnd Bergmann 33