xref: /linux/Documentation/devicetree/bindings/spi/spi-bus.txt (revision e05dacd71db0a5da7c1a44bcaab2a8a240b9c233)
1SPI (Serial Peripheral Interface) busses
2
3SPI busses can be described with a node for the SPI master device
4and a set of child nodes for each SPI slave on the bus.  For this
5discussion, it is assumed that the system's SPI controller is in
6SPI master mode.  This binding does not describe SPI controllers
7in slave mode.
8
9The SPI master node requires the following properties:
10- #address-cells  - number of cells required to define a chip select
11    		address on the SPI bus.
12- #size-cells     - should be zero.
13- compatible      - name of SPI bus controller following generic names
14    		recommended practice.
15No other properties are required in the SPI bus node.  It is assumed
16that a driver for an SPI bus device will understand that it is an SPI bus.
17However, the binding does not attempt to define the specific method for
18assigning chip select numbers.  Since SPI chip select configuration is
19flexible and non-standardized, it is left out of this binding with the
20assumption that board specific platform code will be used to manage
21chip selects.  Individual drivers can define additional properties to
22support describing the chip select layout.
23
24Optional property:
25- num-cs : total number of chipselects
26
27SPI slave nodes must be children of the SPI master node and can
28contain the following properties.
29- reg             - (required) chip select address of device.
30- compatible      - (required) name of SPI device following generic names
31    		recommended practice
32- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
33- spi-cpol        - (optional) Empty property indicating device requires
34    		inverse clock polarity (CPOL) mode
35- spi-cpha        - (optional) Empty property indicating device requires
36    		shifted clock phase (CPHA) mode
37- spi-cs-high     - (optional) Empty property indicating device requires
38    		chip select active high
39
40SPI example for an MPC5200 SPI bus:
41	spi@f00 {
42		#address-cells = <1>;
43		#size-cells = <0>;
44		compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
45		reg = <0xf00 0x20>;
46		interrupts = <2 13 0 2 14 0>;
47		interrupt-parent = <&mpc5200_pic>;
48
49		ethernet-switch@0 {
50			compatible = "micrel,ks8995m";
51			spi-max-frequency = <1000000>;
52			reg = <0>;
53		};
54
55		codec@1 {
56			compatible = "ti,tlv320aic26";
57			spi-max-frequency = <100000>;
58			reg = <1>;
59		};
60	};
61