xref: /linux/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
8
9maintainers:
10  - Mark Brown <broonie@kernel.org>
11
12allOf:
13  - $ref: spi-controller.yaml#
14  - if:
15      properties:
16        compatible:
17          contains:
18            enum:
19              - mscc,ocelot-spi
20              - mscc,jaguar2-spi
21    then:
22      properties:
23        reg:
24          minItems: 2
25  - if:
26      properties:
27        compatible:
28          contains:
29            enum:
30              - baikal,bt1-sys-ssi
31    then:
32      properties:
33        mux-controls:
34          maxItems: 1
35      required:
36        - mux-controls
37    else:
38      required:
39        - interrupts
40  - if:
41      properties:
42        compatible:
43          contains:
44            const: amd,pensando-elba-spi
45    then:
46      required:
47        - amd,pensando-elba-syscon
48    else:
49      properties:
50        amd,pensando-elba-syscon: false
51
52properties:
53  compatible:
54    oneOf:
55      - description: Generic DW SPI Controller
56        enum:
57          - snps,dw-apb-ssi
58          - snps,dwc-ssi-1.01a
59      - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
60        items:
61          - enum:
62              - mscc,ocelot-spi
63              - mscc,jaguar2-spi
64          - const: snps,dw-apb-ssi
65      - description: Microchip Sparx5 SoC SPI Controller
66        const: microchip,sparx5-spi
67      - description: Amazon Alpine SPI Controller
68        const: amazon,alpine-dw-apb-ssi
69      - description: Renesas RZ/N1 SPI Controller
70        items:
71          - const: renesas,rzn1-spi
72          - const: snps,dw-apb-ssi
73      - description: Intel Keem Bay SPI Controller
74        const: intel,keembay-ssi
75      - description: Intel Mount Evans Integrated Management Complex SPI Controller
76        const: intel,mountevans-imc-ssi
77      - description: AMD Pensando Elba SoC SPI Controller
78        const: amd,pensando-elba-spi
79      - description: Baikal-T1 SPI Controller
80        const: baikal,bt1-ssi
81      - description: Baikal-T1 System Boot SPI Controller
82        const: baikal,bt1-sys-ssi
83      - description: Canaan Kendryte K210 SoS SPI Controller
84        const: canaan,k210-spi
85      - description: Renesas RZ/N1 SPI Controller
86        items:
87          - enum:
88              - renesas,r9a06g032-spi # RZ/N1D
89              - renesas,r9a06g033-spi # RZ/N1S
90          - const: renesas,rzn1-spi   # RZ/N1
91      - description: T-HEAD TH1520 SoC SPI Controller
92        items:
93          - const: thead,th1520-spi
94          - const: snps,dw-apb-ssi
95
96  reg:
97    minItems: 1
98    items:
99      - description: DW APB SSI controller memory mapped registers
100      - description: SPI MST region map or directly mapped SPI ROM
101
102  interrupts:
103    maxItems: 1
104
105  clocks:
106    minItems: 1
107    items:
108      - description: SPI Controller reference clock source
109      - description: APB interface clock source
110
111  clock-names:
112    minItems: 1
113    items:
114      - const: ssi_clk
115      - const: pclk
116
117  resets:
118    maxItems: 1
119
120  reset-names:
121    const: spi
122
123  reg-io-width:
124    description: I/O register width (in bytes) implemented by this device
125    default: 4
126    enum: [ 2, 4 ]
127
128  num-cs:
129    default: 4
130    minimum: 1
131    maximum: 4
132
133  dmas:
134    items:
135      - description: TX DMA Channel
136      - description: RX DMA Channel
137
138  dma-names:
139    items:
140      - const: tx
141      - const: rx
142
143  rx-sample-delay-ns:
144    default: 0
145    description: |
146      Default value of the rx-sample-delay-ns property.
147      This value will be used if the property is not explicitly defined
148      for a SPI slave device.
149
150      SPI Rx sample delay offset, unit is nanoseconds.
151      The delay from the default sample time before the actual sample of the
152      rxd input signal occurs. The "rx_sample_delay" is an optional feature
153      of the designware controller, and the upper limit is also subject to
154      controller configuration.
155
156  amd,pensando-elba-syscon:
157    $ref: /schemas/types.yaml#/definitions/phandle-array
158    description:
159      Block address to control SPI chip-selects. The Elba SoC system controller
160      provides an interface to override the native DWC SSI CS control.
161
162patternProperties:
163  "^.*@[0-9a-f]+$":
164    type: object
165    additionalProperties: true
166
167    properties:
168      reg:
169        minimum: 0
170        maximum: 3
171
172unevaluatedProperties: false
173
174required:
175  - compatible
176  - reg
177  - "#address-cells"
178  - "#size-cells"
179  - clocks
180
181examples:
182  - |
183    spi@fff00000 {
184      compatible = "snps,dw-apb-ssi";
185      reg = <0xfff00000 0x1000>;
186      #address-cells = <1>;
187      #size-cells = <0>;
188      interrupts = <0 154 4>;
189      clocks = <&spi_m_clk>;
190      num-cs = <2>;
191      cs-gpios = <&gpio0 13 0>,
192                 <&gpio0 14 0>;
193      rx-sample-delay-ns = <3>;
194      flash@1 {
195        compatible = "spi-nand";
196        reg = <1>;
197        rx-sample-delay-ns = <7>;
198      };
199    };
200  - |
201    spi@1f040100 {
202      compatible = "baikal,bt1-sys-ssi";
203      reg = <0x1f040100 0x900>,
204            <0x1c000000 0x1000000>;
205      #address-cells = <1>;
206      #size-cells = <0>;
207      mux-controls = <&boot_mux>;
208      clocks = <&ccu_sys>;
209      clock-names = "ssi_clk";
210    };
211...
212