xref: /linux/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml (revision 08b7174fb8d126e607e385e34b9e1da4f3be274f) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
8
9maintainers:
10  - Mark Brown <broonie@kernel.org>
11
12allOf:
13  - $ref: spi-controller.yaml#
14  - if:
15      properties:
16        compatible:
17          contains:
18            enum:
19              - mscc,ocelot-spi
20              - mscc,jaguar2-spi
21    then:
22      properties:
23        reg:
24          minItems: 2
25  - if:
26      properties:
27        compatible:
28          contains:
29            enum:
30              - baikal,bt1-sys-ssi
31    then:
32      properties:
33        mux-controls:
34          maxItems: 1
35      required:
36        - mux-controls
37    else:
38      required:
39        - interrupts
40  - if:
41      properties:
42        compatible:
43          contains:
44            const: amd,pensando-elba-spi
45    then:
46      required:
47        - amd,pensando-elba-syscon
48    else:
49      properties:
50        amd,pensando-elba-syscon: false
51
52properties:
53  compatible:
54    oneOf:
55      - description: Generic DW SPI Controller
56        enum:
57          - snps,dw-apb-ssi
58          - snps,dwc-ssi-1.01a
59      - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
60        items:
61          - enum:
62              - mscc,ocelot-spi
63              - mscc,jaguar2-spi
64          - const: snps,dw-apb-ssi
65      - description: Microchip Sparx5 SoC SPI Controller
66        const: microchip,sparx5-spi
67      - description: Amazon Alpine SPI Controller
68        const: amazon,alpine-dw-apb-ssi
69      - description: Renesas RZ/N1 SPI Controller
70        items:
71          - const: renesas,rzn1-spi
72          - const: snps,dw-apb-ssi
73      - description: Intel Keem Bay SPI Controller
74        const: intel,keembay-ssi
75      - description: Intel Thunder Bay SPI Controller
76        const: intel,thunderbay-ssi
77      - description: Intel Mount Evans Integrated Management Complex SPI Controller
78        const: intel,mountevans-imc-ssi
79      - description: AMD Pensando Elba SoC SPI Controller
80        const: amd,pensando-elba-spi
81      - description: Baikal-T1 SPI Controller
82        const: baikal,bt1-ssi
83      - description: Baikal-T1 System Boot SPI Controller
84        const: baikal,bt1-sys-ssi
85      - description: Canaan Kendryte K210 SoS SPI Controller
86        const: canaan,k210-spi
87      - description: Renesas RZ/N1 SPI Controller
88        items:
89          - enum:
90              - renesas,r9a06g032-spi # RZ/N1D
91              - renesas,r9a06g033-spi # RZ/N1S
92          - const: renesas,rzn1-spi   # RZ/N1
93
94  reg:
95    minItems: 1
96    items:
97      - description: DW APB SSI controller memory mapped registers
98      - description: SPI MST region map or directly mapped SPI ROM
99
100  interrupts:
101    maxItems: 1
102
103  clocks:
104    minItems: 1
105    items:
106      - description: SPI Controller reference clock source
107      - description: APB interface clock source
108
109  clock-names:
110    minItems: 1
111    items:
112      - const: ssi_clk
113      - const: pclk
114
115  resets:
116    maxItems: 1
117
118  reset-names:
119    const: spi
120
121  reg-io-width:
122    description: I/O register width (in bytes) implemented by this device
123    default: 4
124    enum: [ 2, 4 ]
125
126  num-cs:
127    default: 4
128    minimum: 1
129    maximum: 4
130
131  dmas:
132    items:
133      - description: TX DMA Channel
134      - description: RX DMA Channel
135
136  dma-names:
137    items:
138      - const: tx
139      - const: rx
140
141  rx-sample-delay-ns:
142    default: 0
143    description: |
144      Default value of the rx-sample-delay-ns property.
145      This value will be used if the property is not explicitly defined
146      for a SPI slave device.
147
148      SPI Rx sample delay offset, unit is nanoseconds.
149      The delay from the default sample time before the actual sample of the
150      rxd input signal occurs. The "rx_sample_delay" is an optional feature
151      of the designware controller, and the upper limit is also subject to
152      controller configuration.
153
154  amd,pensando-elba-syscon:
155    $ref: /schemas/types.yaml#/definitions/phandle-array
156    description:
157      Block address to control SPI chip-selects. The Elba SoC system controller
158      provides an interface to override the native DWC SSI CS control.
159
160patternProperties:
161  "^.*@[0-9a-f]+$":
162    type: object
163    properties:
164      reg:
165        minimum: 0
166        maximum: 3
167
168unevaluatedProperties: false
169
170required:
171  - compatible
172  - reg
173  - "#address-cells"
174  - "#size-cells"
175  - clocks
176
177examples:
178  - |
179    spi@fff00000 {
180      compatible = "snps,dw-apb-ssi";
181      reg = <0xfff00000 0x1000>;
182      #address-cells = <1>;
183      #size-cells = <0>;
184      interrupts = <0 154 4>;
185      clocks = <&spi_m_clk>;
186      num-cs = <2>;
187      cs-gpios = <&gpio0 13 0>,
188                 <&gpio0 14 0>;
189      rx-sample-delay-ns = <3>;
190      flash@1 {
191        compatible = "spi-nand";
192        reg = <1>;
193        rx-sample-delay-ns = <7>;
194      };
195    };
196  - |
197    spi@1f040100 {
198      compatible = "baikal,bt1-sys-ssi";
199      reg = <0x1f040100 0x900>,
200            <0x1c000000 0x1000000>;
201      #address-cells = <1>;
202      #size-cells = <0>;
203      mux-controls = <&boot_mux>;
204      clocks = <&ccu_sys>;
205      clock-names = "ssi_clk";
206    };
207...
208