xref: /linux/Documentation/devicetree/bindings/spi/samsung,spi.yaml (revision df9c299371054cb725eef730fd0f1d0fe2ed6bb0) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C/S5P/Exynos SoC SPI controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description:
13  All the SPI controller nodes should be represented in the aliases node using
14  the following format 'spi{n}' where n is a unique number for the alias.
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - google,gs101-spi
21          - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
22          - samsung,s3c6410-spi
23          - samsung,s5pv210-spi # for S5PV210 and S5PC110
24          - samsung,exynos4210-spi
25          - samsung,exynos5433-spi
26          - samsung,exynos850-spi
27          - samsung,exynosautov9-spi
28          - tesla,fsd-spi
29      - items:
30          - enum:
31              - samsung,exynos8895-spi
32              - samsung,exynosautov920-spi
33          - const: samsung,exynos850-spi
34      - const: samsung,exynos7-spi
35        deprecated: true
36
37  clocks:
38    minItems: 2
39    maxItems: 3
40
41  clock-names:
42    minItems: 2
43    maxItems: 3
44
45  dmas:
46    minItems: 2
47    maxItems: 2
48
49  dma-names:
50    items:
51      - const: tx
52      - const: rx
53
54  interrupts:
55    maxItems: 1
56
57  no-cs-readback:
58    description:
59      The CS line is disconnected, therefore the device should not operate
60      based on CS signalling.
61    type: boolean
62
63  num-cs:
64    minimum: 1
65    maximum: 4
66    default: 1
67
68  samsung,spi-src-clk:
69    description:
70      If the spi controller includes a internal clock mux to select the clock
71      source for the spi bus clock, this property can be used to indicate the
72      clock to be used for driving the spi bus clock. If not specified, the
73      clock number 0 is used as default.
74    $ref: /schemas/types.yaml#/definitions/uint32
75    default: 0
76
77  reg:
78    maxItems: 1
79
80required:
81  - compatible
82  - clocks
83  - clock-names
84  - interrupts
85  - reg
86
87allOf:
88  - $ref: spi-controller.yaml#
89  - if:
90      properties:
91        compatible:
92          contains:
93            enum:
94              - samsung,exynos5433-spi
95              - samsung,exynosautov9-spi
96    then:
97      properties:
98        clocks:
99          minItems: 3
100          maxItems: 3
101        clock-names:
102          items:
103            - const: spi
104            - enum:
105                - spi_busclk0
106                - spi_busclk1
107                - spi_busclk2
108                - spi_busclk3
109            - const: spi_ioclk
110    else:
111      properties:
112        clocks:
113          minItems: 2
114          maxItems: 2
115        clock-names:
116          items:
117            - const: spi
118            - enum:
119                - spi_busclk0
120                - spi_busclk1
121                - spi_busclk2
122                - spi_busclk3
123
124unevaluatedProperties: false
125
126examples:
127  - |
128    #include <dt-bindings/clock/exynos5433.h>
129    #include <dt-bindings/clock/samsung,s2mps11.h>
130    #include <dt-bindings/interrupt-controller/arm-gic.h>
131    #include <dt-bindings/gpio/gpio.h>
132
133    spi@14d30000 {
134        compatible = "samsung,exynos5433-spi";
135        reg = <0x14d30000 0x100>;
136        interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
137        dmas = <&pdma0 11>, <&pdma0 10>;
138        dma-names = "tx", "rx";
139        #address-cells = <1>;
140        #size-cells = <0>;
141        clocks = <&cmu_peric CLK_PCLK_SPI1>,
142                 <&cmu_peric CLK_SCLK_SPI1>,
143                 <&cmu_peric CLK_SCLK_IOCLK_SPI1>;
144        clock-names = "spi",
145                      "spi_busclk0",
146                      "spi_ioclk";
147        samsung,spi-src-clk = <0>;
148        pinctrl-names = "default";
149        pinctrl-0 = <&spi1_bus>;
150        num-cs = <1>;
151
152        cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
153
154        audio-codec@0 {
155            compatible = "wlf,wm5110";
156            reg = <0x0>;
157            spi-max-frequency = <20000000>;
158            interrupt-parent = <&gpa0>;
159            interrupts = <4 IRQ_TYPE_NONE>;
160            clocks = <&pmu_system_controller 0>,
161                     <&s2mps13_osc S2MPS11_CLK_BT>;
162            clock-names = "mclk1", "mclk2";
163
164            gpio-controller;
165            #gpio-cells = <2>;
166            interrupt-controller;
167            #interrupt-cells = <2>;
168
169            wlf,micd-detect-debounce = <300>;
170            wlf,micd-bias-start-time = <0x1>;
171            wlf,micd-rate = <0x7>;
172            wlf,micd-dbtime = <0x2>;
173            wlf,micd-force-micbias;
174            wlf,micd-configs = <0x0 1 0>;
175            wlf,hpdet-channel = <1>;
176            wlf,gpsw = <0x1>;
177            wlf,inmode = <2 0 2 0>;
178
179            wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
180            wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
181
182            /* core supplies */
183            AVDD-supply = <&ldo18_reg>;
184            DBVDD1-supply = <&ldo18_reg>;
185            CPVDD-supply = <&ldo18_reg>;
186            DBVDD2-supply = <&ldo18_reg>;
187            DBVDD3-supply = <&ldo18_reg>;
188            SPKVDDL-supply = <&ldo18_reg>;
189            SPKVDDR-supply = <&ldo18_reg>;
190
191            controller-data {
192                samsung,spi-feedback-delay = <0>;
193            };
194        };
195    };
196