1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/renesas,rzv2h-rspi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas RZ/V2H(P) Renesas Serial Peripheral Interface (RSPI) 8 9maintainers: 10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11 12allOf: 13 - $ref: spi-controller.yaml# 14 15properties: 16 compatible: 17 const: renesas,r9a09g057-rspi # RZ/V2H(P) 18 19 reg: 20 maxItems: 1 21 22 interrupts: 23 items: 24 - description: Idle Interrupt 25 - description: Error Interrupt 26 - description: Communication End Interrupt 27 - description: Receive Buffer Full Interrupt 28 - description: Transmit Buffer Empty Interrupt 29 30 interrupt-names: 31 items: 32 - const: idle 33 - const: error 34 - const: end 35 - const: rx 36 - const: tx 37 38 clocks: 39 maxItems: 3 40 41 clock-names: 42 items: 43 - const: pclk 44 - const: pclk_sfr 45 - const: tclk 46 47 resets: 48 maxItems: 2 49 50 reset-names: 51 items: 52 - const: presetn 53 - const: tresetn 54 55 power-domains: 56 maxItems: 1 57 58required: 59 - compatible 60 - reg 61 - interrupts 62 - interrupt-names 63 - clocks 64 - clock-names 65 - resets 66 - reset-names 67 - power-domains 68 - '#address-cells' 69 - '#size-cells' 70 71unevaluatedProperties: false 72 73examples: 74 - | 75 #include <dt-bindings/interrupt-controller/arm-gic.h> 76 #include <dt-bindings/clock/renesas-cpg-mssr.h> 77 spi@12800800 { 78 compatible = "renesas,r9a09g057-rspi"; 79 80 reg = <0x12800800 0x400>; 81 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 82 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 83 <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>, 84 <GIC_SPI 504 IRQ_TYPE_EDGE_RISING>, 85 <GIC_SPI 505 IRQ_TYPE_EDGE_RISING>; 86 interrupt-names = "idle", "error", "end", "rx", "tx"; 87 clocks = <&cpg CPG_MOD 0x5a>, 88 <&cpg CPG_MOD 0x5b>, 89 <&cpg CPG_MOD 0x5c>; 90 clock-names = "pclk", "pclk_sfr", "tclk"; 91 resets = <&cpg 0x7f>, <&cpg 0x80>; 92 reset-names = "presetn", "tresetn"; 93 power-domains = <&cpg>; 94 #address-cells = <1>; 95 #size-cells = <0>; 96 }; 97