xref: /linux/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml (revision 6383b118efafff8cce8fc8fa5b7e893a523b698f) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas MSIOF SPI controller
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: spi-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - const: renesas,msiof-sh73a0     # SH-Mobile AG5
20          - const: renesas,sh-mobile-msiof  # generic SH-Mobile compatible
21                                            # device
22      - items:
23          - enum:
24              - renesas,msiof-r8a7742       # RZ/G1H
25              - renesas,msiof-r8a7743       # RZ/G1M
26              - renesas,msiof-r8a7744       # RZ/G1N
27              - renesas,msiof-r8a7745       # RZ/G1E
28              - renesas,msiof-r8a77470      # RZ/G1C
29              - renesas,msiof-r8a7790       # R-Car H2
30              - renesas,msiof-r8a7791       # R-Car M2-W
31              - renesas,msiof-r8a7792       # R-Car V2H
32              - renesas,msiof-r8a7793       # R-Car M2-N
33              - renesas,msiof-r8a7794       # R-Car E2
34          - const: renesas,rcar-gen2-msiof  # generic R-Car Gen2 and RZ/G1
35                                            # compatible device
36      - items:
37          - enum:
38              - renesas,msiof-r8a774a1      # RZ/G2M
39              - renesas,msiof-r8a774b1      # RZ/G2N
40              - renesas,msiof-r8a774c0      # RZ/G2E
41              - renesas,msiof-r8a7795       # R-Car H3
42              - renesas,msiof-r8a7796       # R-Car M3-W
43              - renesas,msiof-r8a77965      # R-Car M3-N
44              - renesas,msiof-r8a77970      # R-Car V3M
45              - renesas,msiof-r8a77980      # R-Car V3H
46              - renesas,msiof-r8a77990      # R-Car E3
47              - renesas,msiof-r8a77995      # R-Car D3
48          - const: renesas,rcar-gen3-msiof  # generic R-Car Gen3 and RZ/G2
49                                            # compatible device
50      - items:
51          - const: renesas,sh-msiof  # deprecated
52
53  reg:
54    minItems: 1
55    maxItems: 2
56    oneOf:
57      - items:
58          - description: CPU and DMA engine registers
59      - items:
60          - description: CPU registers
61          - description: DMA engine registers
62
63  interrupts:
64    maxItems: 1
65
66  clocks:
67    maxItems: 1
68
69  num-cs:
70    description: |
71      Total number of chip selects (default is 1).
72      Up to 3 native chip selects are supported:
73        0: MSIOF_SYNC
74        1: MSIOF_SS1
75        2: MSIOF_SS2
76      Hardware limitations related to chip selects:
77        - Native chip selects are always deasserted in between transfers
78          that are part of the same message.  Use cs-gpios to work around
79          this.
80        - All slaves using native chip selects must use the same spi-cs-high
81          configuration.  Use cs-gpios to work around this.
82        - When using GPIO chip selects, at least one native chip select must
83          be left unused, as it will be driven anyway.
84    minimum: 1
85    maximum: 3
86    default: 1
87
88  dmas:
89    minItems: 2
90    maxItems: 4
91
92  dma-names:
93    minItems: 2
94    maxItems: 4
95    items:
96      enum: [ tx, rx ]
97
98  renesas,dtdl:
99    description: delay sync signal (setup) in transmit mode.
100    $ref: /schemas/types.yaml#/definitions/uint32
101    enum:
102      - 0        # no bit delay
103      - 50       # 0.5-clock-cycle delay
104      - 100      # 1-clock-cycle delay
105      - 150      # 1.5-clock-cycle delay
106      - 200      # 2-clock-cycle delay
107
108  renesas,syncdl:
109    description: delay sync signal (hold) in transmit mode
110    $ref: /schemas/types.yaml#/definitions/uint32
111    enum:
112      - 0        # no bit delay
113      - 50       # 0.5-clock-cycle delay
114      - 100      # 1-clock-cycle delay
115      - 150      # 1.5-clock-cycle delay
116      - 200      # 2-clock-cycle delay
117      - 300      # 3-clock-cycle delay
118
119  renesas,tx-fifo-size:
120    # deprecated for soctype-specific bindings
121    description: |
122      Override the default TX fifo size.  Unit is words.  Ignored if 0.
123    $ref: /schemas/types.yaml#/definitions/uint32
124    maxItems: 1
125    default: 64
126
127  renesas,rx-fifo-size:
128    # deprecated for soctype-specific bindings
129    description: |
130      Override the default RX fifo size.  Unit is words.  Ignored if 0.
131    $ref: /schemas/types.yaml#/definitions/uint32
132    maxItems: 1
133    default: 64
134
135required:
136  - compatible
137  - reg
138  - interrupts
139  - '#address-cells'
140  - '#size-cells'
141
142examples:
143  - |
144    #include <dt-bindings/clock/r8a7791-clock.h>
145    #include <dt-bindings/interrupt-controller/irq.h>
146
147    msiof0: spi@e6e20000 {
148        compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";
149        reg = <0xe6e20000 0x0064>;
150        interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
151        clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
152        dmas = <&dmac0 0x51>, <&dmac0 0x52>;
153        dma-names = "tx", "rx";
154        #address-cells = <1>;
155        #size-cells = <0>;
156    };
157