xref: /linux/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml (revision daa2be74b1b2302004945b2a5e32424e177cc7da) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip FPGA {Q,}SPI Controllers
8
9description:
10  SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/
11  fabric IP cores they are based on
12
13maintainers:
14  - Conor Dooley <conor.dooley@microchip.com>
15
16properties:
17  compatible:
18    oneOf:
19      - items:
20          - const: microchip,mpfs-qspi
21          - const: microchip,coreqspi-rtl-v2
22      - const: microchip,coreqspi-rtl-v2 # FPGA QSPI
23      - const: microchip,mpfs-spi
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clock-names:
32    maxItems: 1
33
34  clocks:
35    maxItems: 1
36
37required:
38  - compatible
39  - reg
40  - interrupts
41  - clocks
42
43allOf:
44  - $ref: spi-controller.yaml#
45
46  - if:
47      properties:
48        compatible:
49          contains:
50            const: microchip,mpfs-spi
51    then:
52      properties:
53        num-cs:
54          default: 1
55
56  - if:
57      properties:
58        compatible:
59          contains:
60            const: microchip,mpfs-spi
61      not:
62        required:
63          - cs-gpios
64    then:
65      properties:
66        num-cs:
67          maximum: 1
68
69unevaluatedProperties: false
70
71examples:
72  - |
73    #include "dt-bindings/clock/microchip,mpfs-clock.h"
74    spi@20108000 {
75        compatible = "microchip,mpfs-spi";
76        reg = <0x20108000 0x1000>;
77        clocks = <&clkcfg CLK_SPI0>;
78        interrupt-parent = <&plic>;
79        interrupts = <54>;
80    };
81...
82