1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: SPI Bus controller for MediaTek ARM SoCs 8 9maintainers: 10 - Leilk Liu <leilk.liu@mediatek.com> 11 12allOf: 13 - $ref: /schemas/spi/spi-controller.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - items: 19 - enum: 20 - mediatek,mt7629-spi 21 - mediatek,mt8365-spi 22 - const: mediatek,mt7622-spi 23 - items: 24 - enum: 25 - mediatek,mt8516-spi 26 - const: mediatek,mt2712-spi 27 - items: 28 - enum: 29 - mediatek,mt6779-spi 30 - mediatek,mt8186-spi 31 - mediatek,mt8192-spi 32 - mediatek,mt8195-spi 33 - const: mediatek,mt6765-spi 34 - items: 35 - enum: 36 - mediatek,mt7981-spi-ipm 37 - mediatek,mt7986-spi-ipm 38 - mediatek,mt7988-spi-quad 39 - mediatek,mt7988-spi-single 40 - mediatek,mt8188-spi-ipm 41 - const: mediatek,spi-ipm 42 - items: 43 - enum: 44 - mediatek,mt2701-spi 45 - mediatek,mt2712-spi 46 - mediatek,mt6589-spi 47 - mediatek,mt6765-spi 48 - mediatek,mt6893-spi 49 - mediatek,mt7622-spi 50 - mediatek,mt8135-spi 51 - mediatek,mt8173-spi 52 - mediatek,mt8183-spi 53 54 reg: 55 maxItems: 1 56 57 interrupts: 58 maxItems: 1 59 60 clocks: 61 minItems: 3 62 items: 63 - description: clock used for the parent clock 64 - description: clock used for the muxes clock 65 - description: clock used for the clock gate 66 - description: clock used for the AHB bus, this clock is optional 67 68 clock-names: 69 minItems: 3 70 items: 71 - const: parent-clk 72 - const: sel-clk 73 - const: spi-clk 74 - const: hclk 75 76 mediatek,pad-select: 77 $ref: /schemas/types.yaml#/definitions/uint32-array 78 minItems: 1 79 maxItems: 4 80 items: 81 enum: [0, 1, 2, 3] 82 description: 83 specify which pins group(ck/mi/mo/cs) spi controller used. 84 This is an array. 85 86required: 87 - compatible 88 - reg 89 - interrupts 90 - clocks 91 - clock-names 92 - '#address-cells' 93 - '#size-cells' 94 95unevaluatedProperties: false 96 97examples: 98 - | 99 #include <dt-bindings/clock/mt8173-clk.h> 100 #include <dt-bindings/gpio/gpio.h> 101 #include <dt-bindings/interrupt-controller/arm-gic.h> 102 #include <dt-bindings/interrupt-controller/irq.h> 103 104 spi@1100a000 { 105 compatible = "mediatek,mt8173-spi"; 106 #address-cells = <1>; 107 #size-cells = <0>; 108 reg = <0x1100a000 0x1000>; 109 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>; 110 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, 111 <&topckgen CLK_TOP_SPI_SEL>, 112 <&pericfg CLK_PERI_SPI0>; 113 clock-names = "parent-clk", "sel-clk", "spi-clk"; 114 cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>; 115 mediatek,pad-select = <1>, <0>; 116 }; 117