1*7105fdd5SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*7105fdd5SRob Herring (Arm)%YAML 1.2 3*7105fdd5SRob Herring (Arm)--- 4*7105fdd5SRob Herring (Arm)$id: http://devicetree.org/schemas/spi/marvell,orion-spi.yaml# 5*7105fdd5SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*7105fdd5SRob Herring (Arm) 7*7105fdd5SRob Herring (Arm)title: Marvell Orion SPI controller 8*7105fdd5SRob Herring (Arm) 9*7105fdd5SRob Herring (Arm)maintainers: 10*7105fdd5SRob Herring (Arm) - Andrew Lunn <andrew@lunn.ch> 11*7105fdd5SRob Herring (Arm) - Gregory CLEMENT <gregory.clement@bootlin.com> 12*7105fdd5SRob Herring (Arm) 13*7105fdd5SRob Herring (Arm)allOf: 14*7105fdd5SRob Herring (Arm) - $ref: /schemas/spi/spi-controller.yaml# 15*7105fdd5SRob Herring (Arm) 16*7105fdd5SRob Herring (Arm)properties: 17*7105fdd5SRob Herring (Arm) compatible: 18*7105fdd5SRob Herring (Arm) oneOf: 19*7105fdd5SRob Herring (Arm) - enum: 20*7105fdd5SRob Herring (Arm) - marvell,orion-spi 21*7105fdd5SRob Herring (Arm) - marvell,armada-380-spi # For ap80x and cp11x 22*7105fdd5SRob Herring (Arm) - items: 23*7105fdd5SRob Herring (Arm) - enum: 24*7105fdd5SRob Herring (Arm) - marvell,armada-370-spi 25*7105fdd5SRob Herring (Arm) - marvell,armada-375-spi 26*7105fdd5SRob Herring (Arm) - marvell,armada-380-spi 27*7105fdd5SRob Herring (Arm) - marvell,armada-390-spi 28*7105fdd5SRob Herring (Arm) - marvell,armada-xp-spi 29*7105fdd5SRob Herring (Arm) - const: marvell,orion-spi 30*7105fdd5SRob Herring (Arm) 31*7105fdd5SRob Herring (Arm) cell-index: 32*7105fdd5SRob Herring (Arm) description: Instance id for the SPI controller 33*7105fdd5SRob Herring (Arm) deprecated: true 34*7105fdd5SRob Herring (Arm) 35*7105fdd5SRob Herring (Arm) reg: 36*7105fdd5SRob Herring (Arm) minItems: 1 37*7105fdd5SRob Herring (Arm) items: 38*7105fdd5SRob Herring (Arm) - description: control registers 39*7105fdd5SRob Herring (Arm) - description: CS0 MBUS target/attribute registers for direct mode 40*7105fdd5SRob Herring (Arm) - description: CS1 MBUS target/attribute registers for direct mode 41*7105fdd5SRob Herring (Arm) - description: CS2 MBUS target/attribute registers for direct mode 42*7105fdd5SRob Herring (Arm) - description: CS3 MBUS target/attribute registers for direct mode 43*7105fdd5SRob Herring (Arm) - description: CS4 MBUS target/attribute registers for direct mode 44*7105fdd5SRob Herring (Arm) - description: CS5 MBUS target/attribute registers for direct mode 45*7105fdd5SRob Herring (Arm) - description: CS6 MBUS target/attribute registers for direct mode 46*7105fdd5SRob Herring (Arm) - description: CS7 MBUS target/attribute registers for direct mode 47*7105fdd5SRob Herring (Arm) 48*7105fdd5SRob Herring (Arm) clocks: 49*7105fdd5SRob Herring (Arm) minItems: 1 50*7105fdd5SRob Herring (Arm) maxItems: 2 51*7105fdd5SRob Herring (Arm) 52*7105fdd5SRob Herring (Arm) clock-names: 53*7105fdd5SRob Herring (Arm) items: 54*7105fdd5SRob Herring (Arm) - const: core 55*7105fdd5SRob Herring (Arm) - const: axi 56*7105fdd5SRob Herring (Arm) 57*7105fdd5SRob Herring (Arm) interrupts: 58*7105fdd5SRob Herring (Arm) maxItems: 1 59*7105fdd5SRob Herring (Arm) 60*7105fdd5SRob Herring (Arm)required: 61*7105fdd5SRob Herring (Arm) - compatible 62*7105fdd5SRob Herring (Arm) - reg 63*7105fdd5SRob Herring (Arm) - clocks 64*7105fdd5SRob Herring (Arm) 65*7105fdd5SRob Herring (Arm)unevaluatedProperties: false 66*7105fdd5SRob Herring (Arm) 67*7105fdd5SRob Herring (Arm)examples: 68*7105fdd5SRob Herring (Arm) - | 69*7105fdd5SRob Herring (Arm) spi@10600 { 70*7105fdd5SRob Herring (Arm) compatible = "marvell,orion-spi"; 71*7105fdd5SRob Herring (Arm) #address-cells = <1>; 72*7105fdd5SRob Herring (Arm) #size-cells = <0>; 73*7105fdd5SRob Herring (Arm) cell-index = <0>; 74*7105fdd5SRob Herring (Arm) reg = <0x10600 0x28>; 75*7105fdd5SRob Herring (Arm) clocks = <&coreclk 0>; 76*7105fdd5SRob Herring (Arm) interrupts = <23>; 77*7105fdd5SRob Herring (Arm) }; 78*7105fdd5SRob Herring (Arm) - | 79*7105fdd5SRob Herring (Arm) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) 80*7105fdd5SRob Herring (Arm) 81*7105fdd5SRob Herring (Arm) bus { 82*7105fdd5SRob Herring (Arm) #address-cells = <2>; 83*7105fdd5SRob Herring (Arm) #size-cells = <1>; 84*7105fdd5SRob Herring (Arm) 85*7105fdd5SRob Herring (Arm) spi@10600 { 86*7105fdd5SRob Herring (Arm) compatible = "marvell,orion-spi"; 87*7105fdd5SRob Herring (Arm) #address-cells = <1>; 88*7105fdd5SRob Herring (Arm) #size-cells = <0>; 89*7105fdd5SRob Herring (Arm) cell-index = <0>; 90*7105fdd5SRob Herring (Arm) reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */ 91*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */ 92*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */ 93*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */ 94*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */ 95*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */ 96*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */ 97*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */ 98*7105fdd5SRob Herring (Arm) <MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */ 99*7105fdd5SRob Herring (Arm) clocks = <&coreclk 0>; 100*7105fdd5SRob Herring (Arm) interrupts = <23>; 101*7105fdd5SRob Herring (Arm) }; 102*7105fdd5SRob Herring (Arm) }; 103