1*7ed66c6dSRich FelkerJ-Core SPI master 2*7ed66c6dSRich Felker 3*7ed66c6dSRich FelkerRequired properties: 4*7ed66c6dSRich Felker 5*7ed66c6dSRich Felker- compatible: Must be "jcore,spi2". 6*7ed66c6dSRich Felker 7*7ed66c6dSRich Felker- reg: Memory region for registers. 8*7ed66c6dSRich Felker 9*7ed66c6dSRich Felker- #address-cells: Must be 1. 10*7ed66c6dSRich Felker 11*7ed66c6dSRich Felker- #size-cells: Must be 0. 12*7ed66c6dSRich Felker 13*7ed66c6dSRich FelkerOptional properties: 14*7ed66c6dSRich Felker 15*7ed66c6dSRich Felker- clocks: If a phandle named "ref_clk" is present, SPI clock speed 16*7ed66c6dSRich Felker programming is relative to the frequency of the indicated clock. 17*7ed66c6dSRich Felker Necessary only if the input clock rate is something other than a 18*7ed66c6dSRich Felker fixed 50 MHz. 19*7ed66c6dSRich Felker 20*7ed66c6dSRich Felker- clock-names: Clock names, one for each phandle in clocks. 21*7ed66c6dSRich Felker 22*7ed66c6dSRich FelkerSee spi-bus.txt for additional properties not specific to this device. 23*7ed66c6dSRich Felker 24*7ed66c6dSRich FelkerExample: 25*7ed66c6dSRich Felker 26*7ed66c6dSRich Felkerspi@40 { 27*7ed66c6dSRich Felker compatible = "jcore,spi2"; 28*7ed66c6dSRich Felker #address-cells = <1>; 29*7ed66c6dSRich Felker #size-cells = <0>; 30*7ed66c6dSRich Felker reg = <0x40 0x8>; 31*7ed66c6dSRich Felker spi-max-frequency = <25000000>; 32*7ed66c6dSRich Felker clocks = <&bus_clk>; 33*7ed66c6dSRich Felker clock-names = "ref_clk"; 34*7ed66c6dSRich Felker} 35