xref: /linux/Documentation/devicetree/bindings/spi/amlogic,a4-spisg.yaml (revision 0262163136de813894cb172aa8ccf762b92e5fd7)
1*78d35a20SSunny Luo# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*78d35a20SSunny Luo# Copyright (C) 2025 Amlogic, Inc. All rights reserved
3*78d35a20SSunny Luo%YAML 1.2
4*78d35a20SSunny Luo---
5*78d35a20SSunny Luo$id: http://devicetree.org/schemas/spi/amlogic,a4-spisg.yaml#
6*78d35a20SSunny Luo$schema: http://devicetree.org/meta-schemas/core.yaml#
7*78d35a20SSunny Luo
8*78d35a20SSunny Luotitle: Amlogic SPI Scatter-Gather Controller
9*78d35a20SSunny Luo
10*78d35a20SSunny Luomaintainers:
11*78d35a20SSunny Luo  - Xianwei Zhao <xianwei.zhao@amlogic.com>
12*78d35a20SSunny Luo  - Sunny Luo <sunny.luo@amlogic.com>
13*78d35a20SSunny Luo
14*78d35a20SSunny LuoallOf:
15*78d35a20SSunny Luo  - $ref: spi-controller.yaml#
16*78d35a20SSunny Luo
17*78d35a20SSunny Luoproperties:
18*78d35a20SSunny Luo  compatible:
19*78d35a20SSunny Luo    const: amlogic,a4-spisg
20*78d35a20SSunny Luo
21*78d35a20SSunny Luo  reg:
22*78d35a20SSunny Luo    maxItems: 1
23*78d35a20SSunny Luo
24*78d35a20SSunny Luo  interrupts:
25*78d35a20SSunny Luo    maxItems: 1
26*78d35a20SSunny Luo
27*78d35a20SSunny Luo  clocks:
28*78d35a20SSunny Luo    maxItems: 2
29*78d35a20SSunny Luo
30*78d35a20SSunny Luo  clock-names:
31*78d35a20SSunny Luo    items:
32*78d35a20SSunny Luo      - const: core
33*78d35a20SSunny Luo      - const: pclk
34*78d35a20SSunny Luo
35*78d35a20SSunny Luo  resets:
36*78d35a20SSunny Luo    maxItems: 1
37*78d35a20SSunny Luo
38*78d35a20SSunny Luorequired:
39*78d35a20SSunny Luo  - compatible
40*78d35a20SSunny Luo  - reg
41*78d35a20SSunny Luo  - interrupts
42*78d35a20SSunny Luo  - clocks
43*78d35a20SSunny Luo  - clock-names
44*78d35a20SSunny Luo
45*78d35a20SSunny LuounevaluatedProperties: false
46*78d35a20SSunny Luo
47*78d35a20SSunny Luoexamples:
48*78d35a20SSunny Luo  - |
49*78d35a20SSunny Luo    #include <dt-bindings/interrupt-controller/arm-gic.h>
50*78d35a20SSunny Luo    spi@50000 {
51*78d35a20SSunny Luo        compatible = "amlogic,a4-spisg";
52*78d35a20SSunny Luo        reg = <0x50000 0x38>;
53*78d35a20SSunny Luo        interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
54*78d35a20SSunny Luo        clocks = <&clkc 37>,
55*78d35a20SSunny Luo                 <&clkc 93>;
56*78d35a20SSunny Luo        clock-names = "core", "pclk";
57*78d35a20SSunny Luo        #address-cells = <1>;
58*78d35a20SSunny Luo        #size-cells = <0>;
59*78d35a20SSunny Luo    };
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