1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/wlf,wm8960.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Wolfson WM8960 audio codec 8 9maintainers: 10 - patches@opensource.cirrus.com 11 12properties: 13 compatible: 14 const: wlf,wm8960 15 16 reg: 17 maxItems: 1 18 19 clocks: 20 maxItems: 1 21 22 clock-names: 23 items: 24 - const: mclk 25 26 '#sound-dai-cells': 27 const: 0 28 29 wlf,capless: 30 type: boolean 31 description: 32 If present, OUT3 pin will be enabled and disabled together with HP_L and 33 HP_R pins in response to jack detect events. 34 35 wlf,gpio-cfg: 36 $ref: /schemas/types.yaml#/definitions/uint32-array 37 maxItems: 2 38 description: | 39 A list of GPIO configuration register values. 40 - gpio-cfg[0]: ALRCGPIO of R9 (Audio interface) 41 - gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4). 42 43 wlf,hp-cfg: 44 $ref: /schemas/types.yaml#/definitions/uint32-array 45 maxItems: 3 46 description: | 47 A list of headphone jack detect configuration register values: 48 - hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4). 49 - hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2). 50 - hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1). 51 52 wlf,shared-lrclk: 53 type: boolean 54 description: 55 If present, the LRCM bit of R24 (Additional control 2) gets set, 56 indicating that ADCLRC and DACLRC pins will be disabled only when ADC 57 (Left and Right) and DAC (Left and Right) are disabled. 58 When WM8960 works on synchronize mode and DACLRC pin is used to supply 59 frame clock, it will no frame clock for captrue unless enable DAC to 60 enable DACLRC pin. If shared-lrclk is present, no need to enable DAC for 61 captrue. 62 63required: 64 - compatible 65 - reg 66 67allOf: 68 - $ref: dai-common.yaml# 69 70unevaluatedProperties: false 71 72examples: 73 - | 74 i2c { 75 #address-cells = <1>; 76 #size-cells = <0>; 77 78 audio-codec@1a { 79 compatible = "wlf,wm8960"; 80 reg = <0x1a>; 81 clocks = <&clks 0>; 82 clock-names = "mclk"; 83 #sound-dai-cells = <0>; 84 wlf,hp-cfg = <3 2 3>; 85 wlf,gpio-cfg = <1 3>; 86 wlf,shared-lrclk; 87 }; 88 }; 89