1*5067f61cSSen Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*5067f61cSSen Wang%YAML 1.2 3*5067f61cSSen Wang--- 4*5067f61cSSen Wang$id: http://devicetree.org/schemas/sound/ti,tas67524.yaml# 5*5067f61cSSen Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5067f61cSSen Wang 7*5067f61cSSen Wangtitle: Texas Instruments TAS67524 Audio Amplifier 8*5067f61cSSen Wang 9*5067f61cSSen Wangmaintainers: 10*5067f61cSSen Wang - Sen Wang <sen@ti.com> 11*5067f61cSSen Wang 12*5067f61cSSen Wangdescription: 13*5067f61cSSen Wang The TAS67524 is a four-channel, digital-input, automotive 14*5067f61cSSen Wang Class-D audio amplifier with load diagnostics and an integrated 15*5067f61cSSen Wang DSP for audio processing. 16*5067f61cSSen Wang 17*5067f61cSSen WangallOf: 18*5067f61cSSen Wang - $ref: dai-common.yaml# 19*5067f61cSSen Wang 20*5067f61cSSen Wangproperties: 21*5067f61cSSen Wang compatible: 22*5067f61cSSen Wang oneOf: 23*5067f61cSSen Wang - items: 24*5067f61cSSen Wang - enum: 25*5067f61cSSen Wang - ti,tas6754 26*5067f61cSSen Wang - const: ti,tas67524 27*5067f61cSSen Wang - const: ti,tas67524 28*5067f61cSSen Wang 29*5067f61cSSen Wang reg: 30*5067f61cSSen Wang maxItems: 1 31*5067f61cSSen Wang 32*5067f61cSSen Wang '#sound-dai-cells': 33*5067f61cSSen Wang const: 1 34*5067f61cSSen Wang description: | 35*5067f61cSSen Wang The device exposes three DAIs, selected by index. 36*5067f61cSSen Wang 0 - Standard Audio Path (Playback) 37*5067f61cSSen Wang 1 - Low-Latency Playback Path (Playback) 38*5067f61cSSen Wang 2 - Sensory Feedback (Capture - Vpredict and Isense) 39*5067f61cSSen Wang By default, all four channels of each DAI are active. 40*5067f61cSSen Wang 41*5067f61cSSen Wang interrupts: 42*5067f61cSSen Wang maxItems: 1 43*5067f61cSSen Wang description: 44*5067f61cSSen Wang Active-low falling-edge interrupt from the FAULT pin. When provided, 45*5067f61cSSen Wang the driver uses IRQ-driven fault reporting instead of polling. 46*5067f61cSSen Wang 47*5067f61cSSen Wang powerdown-gpios: 48*5067f61cSSen Wang maxItems: 1 49*5067f61cSSen Wang description: 50*5067f61cSSen Wang GPIO connected to the PD pin, active low. Controls the internal 51*5067f61cSSen Wang digital circuitry power state. When asserted the device enters 52*5067f61cSSen Wang full power-down mode and all register state is lost. Can be omitted if 53*5067f61cSSen Wang PD pin is hardwired or externally controlled. 54*5067f61cSSen Wang 55*5067f61cSSen Wang standby-gpios: 56*5067f61cSSen Wang maxItems: 1 57*5067f61cSSen Wang description: 58*5067f61cSSen Wang GPIO connected to the STBY pin, active low. Controls the analog 59*5067f61cSSen Wang power stage. When asserted the device enters Deep Sleep mode but 60*5067f61cSSen Wang remains I2C-accessible with registers retained. Can be omitted if 61*5067f61cSSen Wang STBY pin is tied to PD or hardwired. 62*5067f61cSSen Wang 63*5067f61cSSen Wang dvdd-supply: 64*5067f61cSSen Wang description: 65*5067f61cSSen Wang Digital logic supply (1.62 V to 3.6 V). All three supply rails must 66*5067f61cSSen Wang be within their recommended operating ranges before the PD pin is 67*5067f61cSSen Wang released. 68*5067f61cSSen Wang 69*5067f61cSSen Wang pvdd-supply: 70*5067f61cSSen Wang description: 71*5067f61cSSen Wang Output FET power supply (4.5 V to 19 V). All three supply rails must 72*5067f61cSSen Wang be within their recommended operating ranges before the PD pin is 73*5067f61cSSen Wang released. 74*5067f61cSSen Wang 75*5067f61cSSen Wang vbat-supply: 76*5067f61cSSen Wang description: 77*5067f61cSSen Wang Battery supply for the Class-D output stage (4.5 V to 19 V). Optional 78*5067f61cSSen Wang when PVDD and VBAT are connected to the same supply rail. When absent, 79*5067f61cSSen Wang VBAT is assumed hardwired to PVDD. 80*5067f61cSSen Wang 81*5067f61cSSen Wang ti,fast-boot: 82*5067f61cSSen Wang type: boolean 83*5067f61cSSen Wang description: 84*5067f61cSSen Wang Skip DC load diagnostic sweep at power-on to reduce boot latency. 85*5067f61cSSen Wang Automatic diagnostics after fault conditions remain enabled. Hardware 86*5067f61cSSen Wang overcurrent protection is always active. 87*5067f61cSSen Wang 88*5067f61cSSen Wang ti,audio-slot-no: 89*5067f61cSSen Wang $ref: /schemas/types.yaml#/definitions/uint32 90*5067f61cSSen Wang description: 91*5067f61cSSen Wang TDM slot offset for the standard audio playback path via SDIN1. A value 92*5067f61cSSen Wang of 4 maps to slot 4. If omitted, slot assignment is derived from the 93*5067f61cSSen Wang tx_mask provided via set_tdm_slot(). Without either property, no slot 94*5067f61cSSen Wang mapping is configured. 95*5067f61cSSen Wang 96*5067f61cSSen Wang ti,llp-slot-no: 97*5067f61cSSen Wang $ref: /schemas/types.yaml#/definitions/uint32 98*5067f61cSSen Wang description: 99*5067f61cSSen Wang TDM slot offset for the low-latency playback path via SDIN1. If omitted, 100*5067f61cSSen Wang slot assignment is derived from the tx_mask provided via set_tdm_slot(). 101*5067f61cSSen Wang Without either property, no slot mapping is configured. Disabled outside 102*5067f61cSSen Wang of LLP mode, and only relevant for TDM formats. 103*5067f61cSSen Wang 104*5067f61cSSen Wang ti,vpredict-slot-no: 105*5067f61cSSen Wang $ref: /schemas/types.yaml#/definitions/uint32 106*5067f61cSSen Wang description: | 107*5067f61cSSen Wang In TDM mode, enables Vpredict output and assigns its starting slot; 108*5067f61cSSen Wang four consecutive slots carry Vpredict Ch1-4 on SDOUT1. May coexist 109*5067f61cSSen Wang with ti,isense-slot-no using separate non-overlapping slots. 110*5067f61cSSen Wang 111*5067f61cSSen Wang In I2S mode, enables Vpredict output on SDOUT1 (Ch1/Ch2) and SDOUT2 112*5067f61cSSen Wang (Ch3/Ch4). The slot value is unused. Requires a GPIO configured as 113*5067f61cSSen Wang sdout2 for Ch3/Ch4; without it only Ch1/Ch2 are output. Mutually 114*5067f61cSSen Wang exclusive with ti,isense-slot-no; if both are set, Vpredict takes 115*5067f61cSSen Wang priority. 116*5067f61cSSen Wang 117*5067f61cSSen Wang Irrelevant in Left-J and Right-J modes. 118*5067f61cSSen Wang 119*5067f61cSSen Wang ti,isense-slot-no: 120*5067f61cSSen Wang $ref: /schemas/types.yaml#/definitions/uint32 121*5067f61cSSen Wang description: | 122*5067f61cSSen Wang In TDM mode, enables Isense output and assigns its starting slot; 123*5067f61cSSen Wang four consecutive slots carry Isense Ch1-4 on SDOUT1. May coexist 124*5067f61cSSen Wang with ti,vpredict-slot-no using separate non-overlapping slots. 125*5067f61cSSen Wang 126*5067f61cSSen Wang In I2S mode, enables Isense output on SDOUT1 (Ch1/Ch2) and SDOUT2 127*5067f61cSSen Wang (Ch3/Ch4). The slot value is unused. Requires a GPIO configured as 128*5067f61cSSen Wang SDOUT2 for Ch3/Ch4; without it only Ch1/Ch2 are output. Mutually 129*5067f61cSSen Wang exclusive with ti,vpredict-slot-no; Vpredict takes priority if both 130*5067f61cSSen Wang are set. 131*5067f61cSSen Wang 132*5067f61cSSen Wang Irrelevant in Left-J and Right-J modes. 133*5067f61cSSen Wang 134*5067f61cSSen Wang ti,gpio1-function: 135*5067f61cSSen Wang $ref: /schemas/types.yaml#/definitions/string 136*5067f61cSSen Wang description: 137*5067f61cSSen Wang Function for the GPIO_1 pin. When omitted, GPIO_1 remains in its 138*5067f61cSSen Wang power-on default state. 139*5067f61cSSen Wang enum: 140*5067f61cSSen Wang - low # Output: driven low 141*5067f61cSSen Wang - auto-mute # Output: high when all channels are auto-muted 142*5067f61cSSen Wang - auto-mute-ch4 # Output: high when channel 4 is auto-muted 143*5067f61cSSen Wang - auto-mute-ch3 # Output: high when channel 3 is auto-muted 144*5067f61cSSen Wang - auto-mute-ch2 # Output: high when channel 2 is auto-muted 145*5067f61cSSen Wang - auto-mute-ch1 # Output: high when channel 1 is auto-muted 146*5067f61cSSen Wang - sdout2 # Output: Routes secondary serial data output 2 147*5067f61cSSen Wang - sdout1 # Output: Re-routes secondary serial data output 1 148*5067f61cSSen Wang - warn # Output: warning signal (OTW, CBC) 149*5067f61cSSen Wang - fault # Output: fault signal (OTSD, OC, DC) 150*5067f61cSSen Wang - clock-sync # Output: clock synchronisation 151*5067f61cSSen Wang - invalid-clock # Output: high when clock is invalid 152*5067f61cSSen Wang - high # Output: driven high 153*5067f61cSSen Wang - mute # Input: external mute control 154*5067f61cSSen Wang - phase-sync # Input: phase synchronisation 155*5067f61cSSen Wang - sdin2 # Input: secondary SDIN2 for I2S/LJ/RJ ch3/ch4 156*5067f61cSSen Wang - deep-sleep # Input: asserted transitions device to Deep Sleep 157*5067f61cSSen Wang - hiz # Input: asserted transitions device to Hi-Z 158*5067f61cSSen Wang - play # Input: asserted transitions device to Play 159*5067f61cSSen Wang - sleep # Input: asserted transitions device to Sleep 160*5067f61cSSen Wang 161*5067f61cSSen Wang ti,gpio2-function: 162*5067f61cSSen Wang $ref: /schemas/types.yaml#/definitions/string 163*5067f61cSSen Wang description: 164*5067f61cSSen Wang Function for the GPIO_2 pin. When omitted, GPIO_2 remains in its 165*5067f61cSSen Wang power-on default state. 166*5067f61cSSen Wang enum: 167*5067f61cSSen Wang - low # Output: driven low 168*5067f61cSSen Wang - auto-mute # Output: high when all channels are auto-muted 169*5067f61cSSen Wang - auto-mute-ch4 # Output: high when channel 4 is auto-muted 170*5067f61cSSen Wang - auto-mute-ch3 # Output: high when channel 3 is auto-muted 171*5067f61cSSen Wang - auto-mute-ch2 # Output: high when channel 2 is auto-muted 172*5067f61cSSen Wang - auto-mute-ch1 # Output: high when channel 1 is auto-muted 173*5067f61cSSen Wang - sdout2 # Output: Routes secondary serial data output 2 174*5067f61cSSen Wang - sdout1 # Output: Re-routes secondary serial data output 1 175*5067f61cSSen Wang - warn # Output: warning signal (OTW, CBC) 176*5067f61cSSen Wang - fault # Output: fault signal (OTSD, OC, DC) 177*5067f61cSSen Wang - clock-sync # Output: clock synchronisation 178*5067f61cSSen Wang - invalid-clock # Output: high when clock is invalid 179*5067f61cSSen Wang - high # Output: driven high 180*5067f61cSSen Wang - mute # Input: external mute control 181*5067f61cSSen Wang - phase-sync # Input: phase synchronisation 182*5067f61cSSen Wang - sdin2 # Input: secondary SDIN2 for I2S/LJ/RJ ch3/ch4 183*5067f61cSSen Wang - deep-sleep # Input: asserted transitions device to Deep Sleep 184*5067f61cSSen Wang - hiz # Input: asserted transitions device to Hi-Z 185*5067f61cSSen Wang - play # Input: asserted transitions device to Play 186*5067f61cSSen Wang - sleep # Input: asserted transitions device to Sleep 187*5067f61cSSen Wang 188*5067f61cSSen Wang ports: 189*5067f61cSSen Wang $ref: /schemas/graph.yaml#/properties/ports 190*5067f61cSSen Wang properties: 191*5067f61cSSen Wang port@0: 192*5067f61cSSen Wang $ref: audio-graph-port.yaml# 193*5067f61cSSen Wang unevaluatedProperties: false 194*5067f61cSSen Wang description: Standard audio playback port (DAI 0). 195*5067f61cSSen Wang 196*5067f61cSSen Wang port@1: 197*5067f61cSSen Wang $ref: audio-graph-port.yaml# 198*5067f61cSSen Wang unevaluatedProperties: false 199*5067f61cSSen Wang description: Low-latency playback port (LLP) (DAI 1). 200*5067f61cSSen Wang 201*5067f61cSSen Wang port@2: 202*5067f61cSSen Wang $ref: audio-graph-port.yaml# 203*5067f61cSSen Wang unevaluatedProperties: false 204*5067f61cSSen Wang description: Sensory feedback capture port (DAI 2). 205*5067f61cSSen Wang 206*5067f61cSSen Wang port: 207*5067f61cSSen Wang $ref: audio-graph-port.yaml# 208*5067f61cSSen Wang unevaluatedProperties: false 209*5067f61cSSen Wang 210*5067f61cSSen Wangrequired: 211*5067f61cSSen Wang - compatible 212*5067f61cSSen Wang - reg 213*5067f61cSSen Wang - '#sound-dai-cells' 214*5067f61cSSen Wang - dvdd-supply 215*5067f61cSSen Wang - pvdd-supply 216*5067f61cSSen Wang 217*5067f61cSSen WanganyOf: 218*5067f61cSSen Wang - required: [powerdown-gpios] 219*5067f61cSSen Wang - required: [standby-gpios] 220*5067f61cSSen Wang 221*5067f61cSSen WangunevaluatedProperties: false 222*5067f61cSSen Wang 223*5067f61cSSen Wangexamples: 224*5067f61cSSen Wang - | 225*5067f61cSSen Wang #include <dt-bindings/gpio/gpio.h> 226*5067f61cSSen Wang 227*5067f61cSSen Wang i2c { 228*5067f61cSSen Wang #address-cells = <1>; 229*5067f61cSSen Wang #size-cells = <0>; 230*5067f61cSSen Wang 231*5067f61cSSen Wang amplifier@70 { 232*5067f61cSSen Wang compatible = "ti,tas67524"; 233*5067f61cSSen Wang reg = <0x70>; 234*5067f61cSSen Wang #sound-dai-cells = <1>; 235*5067f61cSSen Wang sound-name-prefix = "TAS0"; 236*5067f61cSSen Wang 237*5067f61cSSen Wang standby-gpios = <&main_gpio0 33 GPIO_ACTIVE_LOW>; 238*5067f61cSSen Wang 239*5067f61cSSen Wang dvdd-supply = <&dvdd_1v8>; 240*5067f61cSSen Wang pvdd-supply = <&pvdd_12v>; 241*5067f61cSSen Wang vbat-supply = <&vbat_12v>; 242*5067f61cSSen Wang 243*5067f61cSSen Wang ti,audio-slot-no = <0>; 244*5067f61cSSen Wang ti,llp-slot-no = <4>; 245*5067f61cSSen Wang ti,vpredict-slot-no = <0>; 246*5067f61cSSen Wang ti,isense-slot-no = <4>; 247*5067f61cSSen Wang 248*5067f61cSSen Wang ti,gpio2-function = "warn"; 249*5067f61cSSen Wang 250*5067f61cSSen Wang ports { 251*5067f61cSSen Wang #address-cells = <1>; 252*5067f61cSSen Wang #size-cells = <0>; 253*5067f61cSSen Wang 254*5067f61cSSen Wang port@0 { 255*5067f61cSSen Wang reg = <0>; 256*5067f61cSSen Wang 257*5067f61cSSen Wang tas0_audio_ep: endpoint { 258*5067f61cSSen Wang dai-format = "dsp_b"; 259*5067f61cSSen Wang remote-endpoint = <&be_tas0_audio_ep>; 260*5067f61cSSen Wang }; 261*5067f61cSSen Wang }; 262*5067f61cSSen Wang 263*5067f61cSSen Wang port@1 { 264*5067f61cSSen Wang reg = <1>; 265*5067f61cSSen Wang 266*5067f61cSSen Wang tas0_anc_ep: endpoint { 267*5067f61cSSen Wang remote-endpoint = <&be_tas0_anc_ep>; 268*5067f61cSSen Wang }; 269*5067f61cSSen Wang }; 270*5067f61cSSen Wang 271*5067f61cSSen Wang port@2 { 272*5067f61cSSen Wang reg = <2>; 273*5067f61cSSen Wang 274*5067f61cSSen Wang tas0_fb_ep: endpoint { 275*5067f61cSSen Wang remote-endpoint = <&be_tas0_fb_ep>; 276*5067f61cSSen Wang }; 277*5067f61cSSen Wang }; 278*5067f61cSSen Wang }; 279*5067f61cSSen Wang }; 280*5067f61cSSen Wang }; 281