1*b97e4090SMithil Bavishi# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*b97e4090SMithil Bavishi%YAML 1.2 3*b97e4090SMithil Bavishi--- 4*b97e4090SMithil Bavishi$id: http://devicetree.org/schemas/sound/ti,omap4-mcpdm.yaml# 5*b97e4090SMithil Bavishi$schema: http://devicetree.org/meta-schemas/core.yaml# 6*b97e4090SMithil Bavishi 7*b97e4090SMithil Bavishititle: OMAP McPDM 8*b97e4090SMithil Bavishi 9*b97e4090SMithil Bavishimaintainers: 10*b97e4090SMithil Bavishi - Misael Lopez Cruz <misael.lopez@ti.com> 11*b97e4090SMithil Bavishi 12*b97e4090SMithil Bavishidescription: 13*b97e4090SMithil Bavishi OMAP ALSA SoC DAI driver using McPDM port used by TWL6040 14*b97e4090SMithil Bavishi 15*b97e4090SMithil Bavishiproperties: 16*b97e4090SMithil Bavishi compatible: 17*b97e4090SMithil Bavishi const: ti,omap4-mcpdm 18*b97e4090SMithil Bavishi 19*b97e4090SMithil Bavishi reg: 20*b97e4090SMithil Bavishi items: 21*b97e4090SMithil Bavishi - description: MPU access base address 22*b97e4090SMithil Bavishi - description: L3 interconnect address 23*b97e4090SMithil Bavishi 24*b97e4090SMithil Bavishi reg-names: 25*b97e4090SMithil Bavishi items: 26*b97e4090SMithil Bavishi - const: mpu 27*b97e4090SMithil Bavishi - const: dma 28*b97e4090SMithil Bavishi 29*b97e4090SMithil Bavishi interrupts: 30*b97e4090SMithil Bavishi maxItems: 1 31*b97e4090SMithil Bavishi 32*b97e4090SMithil Bavishi dmas: 33*b97e4090SMithil Bavishi maxItems: 2 34*b97e4090SMithil Bavishi 35*b97e4090SMithil Bavishi dma-names: 36*b97e4090SMithil Bavishi items: 37*b97e4090SMithil Bavishi - const: up_link 38*b97e4090SMithil Bavishi - const: dn_link 39*b97e4090SMithil Bavishi 40*b97e4090SMithil Bavishi clocks: 41*b97e4090SMithil Bavishi maxItems: 1 42*b97e4090SMithil Bavishi 43*b97e4090SMithil Bavishi clock-names: 44*b97e4090SMithil Bavishi items: 45*b97e4090SMithil Bavishi - const: pdmclk 46*b97e4090SMithil Bavishi 47*b97e4090SMithil Bavishirequired: 48*b97e4090SMithil Bavishi - compatible 49*b97e4090SMithil Bavishi - reg 50*b97e4090SMithil Bavishi - reg-names 51*b97e4090SMithil Bavishi - interrupts 52*b97e4090SMithil Bavishi - dmas 53*b97e4090SMithil Bavishi - dma-names 54*b97e4090SMithil Bavishi - clocks 55*b97e4090SMithil Bavishi - clock-names 56*b97e4090SMithil Bavishi 57*b97e4090SMithil BavishiadditionalProperties: false 58*b97e4090SMithil Bavishi 59*b97e4090SMithil Bavishiexamples: 60*b97e4090SMithil Bavishi - | 61*b97e4090SMithil Bavishi #include <dt-bindings/interrupt-controller/arm-gic.h> 62*b97e4090SMithil Bavishi mcpdm@0 { 63*b97e4090SMithil Bavishi compatible = "ti,omap4-mcpdm"; 64*b97e4090SMithil Bavishi reg = <0x0 0x7f>, /* MPU private access */ 65*b97e4090SMithil Bavishi <0x49032000 0x7f>; /* L3 Interconnect */ 66*b97e4090SMithil Bavishi reg-names = "mpu", "dma"; 67*b97e4090SMithil Bavishi interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 68*b97e4090SMithil Bavishi interrupt-parent = <&gic>; 69*b97e4090SMithil Bavishi dmas = <&sdma 65>, <&sdma 66>; 70*b97e4090SMithil Bavishi dma-names = "up_link", "dn_link"; 71*b97e4090SMithil Bavishi clocks = <&twl6040>; 72*b97e4090SMithil Bavishi clock-names = "pdmclk"; 73*b97e4090SMithil Bavishi }; 74